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MSPM0C1103: Pin-2-Pin compatibility between MSPM0C110x and MSPM0L130x

Koichiro Tashiro
Mastermind 22935 points
Part Number: MSPM0C1103

Tool/software:

Hi,

MSPM0 promotion slides say MSPM0 devices are pin-2-pin compatible if package is the same.
My customer is interested in C110x and L130x devices. Target packages are DGS20(VSSOP20) and DYY(SOT16).
According to each data sheet, there are a few differences in pin diagram and pin handling requirements.

C110x Datasheet:

L130x Datasheet:


Main differences are:
- L130x has vcore pin and it must be connected to Cvcore capacitor.
- L130x has ROSC pin and Rosc resister is connected on board.

Questions:
Q1) These pins need to handled differently for C110x and L130x? 
(not pin-2-pin compatible in fact?)
Q2) Any other pins need to handled separately?

Thanks and regards,
Koichiro Tashiro

  • 0
    TI__Genius 10490 points

    Hello Tashiro,

    1. For VCORE, L130x must add Cap on VOCRE pin (the recommended value is 470nF). C110x doesn't have VCORE pin because TI adds the Cap into MCU internal. 

    2. For ROSC, it is a resistor used for FCL function which is used to up SYSOSC accuracy. C110x have the internal ROSC, so it doesn't need customer to add external ROSC on device pin. L130x doesn't have internal ROSC, so customer need add external ROSC on PA2. But notice that if you don't use FCL function, you can use PA2 as normal GPIO or other function, you don't need to add ROSC on PA2.

    Best Regards,

    Janz Bai

  • 0 in reply to Janz Bai
    TI__Mastermind 22935 points

    Hi Janz,

    Thanks for your quick reply!
    I understood #2 is acceptable as it still allow customers to use both devices pin-2-pin compatible.
    But #1 seems an issue. We should claim MSPM0 are pin-2-pin compatible *with some exceptions* in our promotion document.

    Thanks and regards,
    Koichiro Tashiro

  • +1 in reply to Koichiro Tashiro
    TI__Genius 10490 points

    Hello Koichiro,

    In fact, C110x releasing is later than L130x. In C110x development process, TI add the VCORE Cap into MCU internal, so the VCORE didn't be brought out to device pin. Which means that customer have more GPIO resource when they use C110x. And except for the VOCRE, other pins are pin-to-pin. Changing from L130x to C110x, or changing from C110x to L130x, customer just need to remove or add the VCORE Cap. But I think the point you mentioned also can be added into our promotion document as a footnote.

    Best Regards,

    Janz Bai