Tool/software:
For my application, I need several different images linked at different locations in MRAM. The bootloader can then select which image to boot based on some conditions. I could successfully boot an image at the start of MRAM, with my bootloader's vector table (at 0x0) redirecting IRQs and exceptions to the app vector table in MRAM. However, I need now to copy that vector table to the internal SRAM to be able to use any of the application images in my MRAM, by setting that SRAM vector table dinamically, as described in SPNA236.
The application copies the vector table at initialization, and debugging shows it's correctly copied:
When an interrupt is generated, it jumps to the SRAM vector table IRQ entry as expected, so my bootloader vector table rediect seems to be working. However, as you can see in the image, the next instruction executed is the FIQ vector entry (0x0800001C), and then 0x08000020, and so on. It looks like CPU is not fetching the opcodes correctly.
I have tried several MPU configurations for that region, currently i have it configured as NORMAL_OITNOWA_NONSHARED and PRIV_RW_USER_RO_EXEC. i set instruction and data barrier instructions before and after compying the vector table (dsb and isb).
Is there something I'm missing here?
