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TMS570LC4357: State of emulation (Halting/Suspend) on IO pins?

AnBer
Mastermind 30110 points
Part Number: TMS570LC4357

Tool/software:

Team,
Can you please help with the below question?
In case this exact functionality is not available what could be possible workaround?
I have looked at the " JTAG Programmer Overview for Hercules-Based Microcontrollers spna230 " app note, but there is no indication of such option.

Does the TMS570LC4357 have a pin/ball where the Debug Halting/Suspend mode/state is visible or could that signal be made visible (by register configuration) on a general purpose I/O pin/ball?
In the latter case, which register configuration would be required?

An external component needs to sync it's operation with the TMS570LC4357 therefore it required that this component recognize when the TMS570LC4357 is halted/suspended/restarted during a JTAG debug session.

Thanks in advance,
Anthony

  • 0
    TI__Guru 69891 points

    Hi Anthony,

    As far as i know, the TMS570LC4357 does not provide a dedicated external pin that directly indicates when the CPU is halted/suspended by debugger.

    I will again check with JTAG expert to confirm whether it is possible or not.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Mastermind 30110 points

    Hi Jagadish,
    -Were you able to double check with our JTAG expert?

    -If the wanted option is not available, are there some mechanism that could be potentially use to determine the Debug state?
    For example is the watchdog stopped when the TMS570LC4357 is halted?
    What other mechanism could be considered for the use case described by customer?

    Thanks in advance,

    Anthony

  • 0 in reply to AnBer
    TI__Guru 69891 points

    Hi Anthony,

    I am discussing this with our internal team, i will provide my updates as soon as i hear them.

    --
    Thanks & regards,
    Jagadish.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 69891 points

    Apologies for the delay!

    I didn't hear back from internal team yet, i will provide you an update as soon as possible.

  • 0 in reply to jagadish gundavarapu
    TI__Guru 69891 points

    Hi Anthony,

    I had below information related to this issue:

    Continue-on-Suspend Bit: In some TMS570 devices, there's a "continue-on-suspend" bit for peripherals. By setting this bit, you can allow a peripheral to continue operating even when the CPU is in a debug mode or suspend state.

    Independent Operation: Many peripherals on the TMS570, such as ADC, NHET, and MibSPI, are designed to operate autonomously, according to TI E2E. This means they can continue to perform their tasks while the CPU is servicing an exception or is in a suspended state.

    Another thought I had was to customize the GEL file for the Debug Halt function and add a GPIO register write before/after the halt/unhalt.  If you are comfortable with GEL files that may be another option. However internal team confirmed that now we don't have any ready code to do this.

    --
    Thanks & regards,
    Jagadish.