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AM2434: Code Sharing Across R5 Cores / single image

Part Number: AM2434

Tool/software:

Hello experts,

We are currently developing a multicore application for the Sitara AM2434.

Due to hardware space constraints, we are using the smaller package variant without external DRAM. Since, to the best of my knowledge, the controller does not support code execution directly from flash, all code and data for each core must reside within the 2MB of on-chip SRAM.

This makes RAM usage a critical concern for us.

We’ve observed that each R5 core builds and loads its own separate binary, resulting in multiple copies of identical code being stored in memory. A typical example is the printf() function, which is included in each core’s image.

Is there any support from TI for sharing code segments across cores to avoid such redundancy? From a high-level perspective, it seems feasible for a global linker or build system to detect and consolidate shared code.

The “single image” approach described in this document appears to suggest something along those lines:
https://www.ti.com/lit/an/sprab27b/sprab27b.pdf?ts=1749582866208

I would greatly appreciate any insights or recommendations from the TI development team on this topic.

Best regards,
Stefan

  • Hi Stefan,

    the controller does not support code execution directly from flash

    I am assuming you were referring to XIP?

    We’ve observed that each R5 core builds and loads its own separate binary, resulting in multiple copies of identical code being stored in memory. A typical example is the printf() function, which is included in each core’s image.

    Is there any support from TI for sharing code segments across cores to avoid such redundancy? From a high-level perspective, it seems feasible for a global linker or build system to detect and consolidate shared code.

    Allow another expert to comment on the same.

    Regards,

    Vaibhav

  • Hi Stefan,

    We’ve observed that each R5 core builds and loads its own separate binary, resulting in multiple copies of identical code being stored in memory. A typical example is the printf() function, which is included in each core’s image.

    I think the isolation/redundancy between the appimages of cores is important because you may not want one of your core to overwrite other cores functionality.

    Consider a case where you have same function name with different implementation, you may not want your function to get overwrite by other core's functionality. The combined/multicore appimage generated will be using different memory region for each core to ensure isolation.

    Regards,

    Tushar

  • Hi Vaibhav and Tushar,

    Thanks for your input!

    I fully understand the importance of isolation between core images, especially to prevent unintended overwrites or conflicts - particularly in cases where functions with the same name have different implementations across cores.

    That said, I wonder if there's room for optimization in cases where functions are truly identical and don’t rely on core-specific memory or peripherals. A more advanced linker could potentially analyze such functions and allow them to be globally linked across cores. This could help eliminate redundant code—like multiple copies of printf()—and significantly reduce memory usage.

    Interestingly, this approach seemed feasible on older TI chips. I’m referring to Chapter 7.3 of the 2012 Multicore Programming Guide, which I linked in my original post. It suggests that shared code sections were possible under certain conditions.

    Would love to hear your thoughts on whether something similar could be implemented or supported on current devices.

    Best regards,
    Stefan

  • Hi Stefan,

    As long as the memory region for the multicore appimage are different for each core, compiler will not do any optimization to remove the redundant definition of similar function because of the reason stated above.

    Can you try keeping the similar functions in shared memory location and update the results?

    Regards,

    Tushar