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MCU-PLUS-SDK-AM243X: High interrupt latency

Maor Shalom
Intellectual 270 points
Part Number: MCU-PLUS-SDK-AM243X

Tool/software:

Hi 

I am using the AM243x to for for a motor control EtherCAT drive.  This is a hard real time application that it main interrupt should run at 32kHz rate (every 31.25us).

I am raising a digital output when I enter the sync 0 interrupt routine. I found that there is a high latency between the EtherCAT sync0 signal and to a digital output I set in the sync0 interrupt.  About  2us difference between the two signals rising edges.

Can you explain what could be the reason for such latency ? 

  • 0
    TI__Genius 9325 points

    Hi,

    At 800MHz, 2μs represents approximately 1600 CPU cycles, which accounts for:
    - Context saving operations
    - Vector table lookup
    - Branch to ISR execution
    - Multiple interrupt controller transitions (CPU + system level)
    - FreeRTOS overhead if applicable

    You can try optimizing the following parameters and see if the delay of ~2us is reducing:

    1. Interrupt Configuration:
    - Configure appropriate priorities for critical interrupts
    - Minimize higher-priority interrupts that could cause delays
    - Review interrupt controller settings

    2. Code-level Optimization:
    - Minimize stack usage in critical ISRs
    - Optimize context saving where possible
    - Reduce function call depth in ISRs

    Let me know if the delay is consistent even after optimization.

    Regards,
    Aaron

  • 0 in reply to Aaron Thomas
    TI__Mastermind 48051 points

    Some of the recommendations in below documentation will also be helpful in reducing the interrupt latency

    AM263x MCU+ SDK: Optimizing applications with MCU SDK

    AM263x MCU+ SDK: Optimizing Real Time Control Applications

  • 0 in reply to Aaron Thomas
    Intellectual 270 points

    Thank you Aaron, I will check your recommendations. Can you specify what is the portion of FreeRTOS overhead  ?

  • 0 in reply to Maor Shalom
    TI__Genius 9325 points

    Hi Maor,

    Thanks for the follow-up.

    Regarding the FreeRTOS overhead contributing to the ~2 µs latency, yes, a portion of that latency may stem from the RTOS, especially if you’re calling FreeRTOS APIs within the ISR. These FreeRTOS operations may not be trivial and can take hundreds of cycles depending on CPU frequency and interrupt nesting.

    In general, I was referring to the fact that on optimizing the R5F code, the latency between the 2 signals you are observing can be reduced. Do let me know if there is a consistent latency between the 2 signal taps even after doing the above optimizations.

    Regards,
    Aaron