TMS570 PBIST self test

Chuck Wong

Hello there,

I'm using the TMS570LS202x6 MCU and try to start self test in accordance with example provided in paragraph 6.8.1 of the Technical Reference Manual, step-by-step, but with issues. My code is shown below:

void tagPbist::RunTests()
{
    MSTGCR_bit.ROM_DIV = 1;         // VBUS = HCLK/2: PBIST will reset for 32 VBUS cycles (4 us)
    MSIENA = 0x00000001;            // enable PBIST controller (not yet self test)
    MSTGCR_bit.MSTGENA = 0xA;       // enable PBIST to start self test

// wait 32 VBUS cycles here (or 64 CPU cycles): 4 us for an 8 MHz VBUS

    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");
    asm(" nop");    asm(" nop");    asm(" nop");    asm(" nop");

PBIST_PACT = 0x3; // normal PBIST operation for ROM based testing and enable internal PBIST clock
PBIST_OVER = 0; // run self test without RAM override

PBIST_ALGO = 0x0000000E; // select algorithms 2, 3 and 4 (triple_read_fast_read for ROM and MARCH13N_RED for RAM)
PBIST_RINFOL = 0x000003CF; // select ROM/RAM groups: PBIST ROM, STCROM, DCAN1, DCAN2, MIBSPI, VIM, MIBADC, DMA

PBIST_ROM = 0x00000003; // both algo and RAM info from ROM for application self test
PBIST_DLR = 0x00000014; // config access to ROM-based testing and kick off the self test

while (MSTCGSTAT_bit.MSTDONE != 1) // wait for the self test to complete
continue; // or first occurrence of test failed

    if ((PBIST_FSRF0==0x01) || (PBIST_FSRF1==0x01)) // detected error in port 0 or 1 following self tests
    {
        // read PBIST_RGS and PBIST_RDS to identify the failure
        // in the PBIST_RAMT register (see TRM Table 6-1)
        // report MCU self test failure to error manager

BitTests.SetMcuFaulty(PBIST_RAMT);
}

PBIST_PACT = 0; // disable internal PBIST clock and internal ROM clock
MSTGCR_bit.MSTGENA = 0x5; // disable PBIST
}

No interrupt is enabled at this time. With the debugger, my issues are identified as:

1) If I set the PBIST_OVER register to 0 (NOT overwrite RAM) as above, the setting of PBIST_RINFOL two lines down the road has no effect, and this register is always 0xFFFFFFFF. At the end of the test, the PBIST flagged MCU error with the DCAN1 device, and execution of the program continues normally (not hang).

2) If I set the PBIST_OVER register to 1 (overwrite RAM) as above, the setting of PBIST_RINFOL two lines down the road is OK, but once PBIST_DLR is written with 0x14 to start self test, the PBIST_RINFOL immediately changes from 0x3CF to 0x1F00. No error is detected at the end but once this function is exited, the Prefetch CPU exception is continually entered and cannot execute any other code.

Can you please help?

Many thanks!

Chuck.

over 13 years ago

0 Haixiao Weng over 13 years ago

TI__Genius 13810 points

Please read

Basic PBIST Configuration and Influence on Current Consumption (Rev. B)

expecially Page 3,

Let me know if it answers your question.

Regards,

Haixiao

0 Chuck Wong over 13 years ago in reply to Haixiao Weng

Genius 3950 points

Hi Haixiao,

Thanks for replying. For question #2, it is now clear because I'm using a subset of the TMS570LS with 144 pins. I shouldn't NEVER use PBIST_OVER=1.

For question #1, I have to move the PBIST_OVER=0 to after PBIST_RINFOL and PBIST_RINFOU got configured in order to write to those registers (i.e PBIST_OVER is default to 1).

My issue however remains. I select algorithms 2, 3 and 4 (triple_read_fast_read for ROM and MARCH13N_RED for RAM) for ROM/RAM groups: PBIST ROM, STCROM, DCAN1, DCAN2, MIBSPI, VIM, MIBADC, DMA, but the result is always DCAN1 failed (RGS/RDS = 1/0).

I doubt very much that I am having a bad MCU with DCAN1 failed. Do you see any inconsistency on my RAM/ROM groups and algorithms selections below?

PBIST_ALGO = 0x0000000E;
PBIST_RINFOL= 0x000003CF;
PBIST_RINFOU= 0x00000000;
PBIST_ROM = 0x00000003;

Thanks!

0 Haixiao Weng over 13 years ago in reply to Chuck Wong

TI__Genius 13810 points

If you select PBIST_OVER=0, you have to seperate the test you are going to run on ROM, single port RAM, two port RAM. In other words, you need to run the pBIST 3 times, one for each different kind of RAM.

Other wise, the test enginee will try to run the Triple-fast read on DCAN RAM because it is selected. Then you get a fail.

Regards,

Haixiao

0 Haixiao Weng over 13 years ago in reply to Haixiao Weng

TI__Genius 13810 points

What is the device name?

0 Chuck Wong over 13 years ago in reply to Haixiao Weng

Genius 3950 points

TMP570LS20216ASP, 144 pins, which should be the pre-production version of TMS570LS20216.

0 Haixiao Weng over 13 years ago in reply to Chuck Wong

TI__Genius 13810 points

OK, then , you should have no problem using PBIST_OVER=1, then, the engine will select all the available algrithms for you. Of course, it will take longer to run.

0 Chuck Wong over 13 years ago in reply to Haixiao Weng

Genius 3950 points

Haixiao Weng said:

OK, then , you should have no problem using PBIST_OVER=1, then, the engine will select all the available algrithms for you. Of course, it will take longer to run.

Well, I'm a bit confused now ... even if I set PBIST_OVER=1, I still have to separate the tests in accordance with their respective groups, such as ROM, single port, two-port etc. Am I right? Your other post earlier is saying that I have to separate only if I set PBIST_OVER=0.

Am I missing something?

Thanks!

0 Haixiao Weng over 13 years ago in reply to Chuck Wong

TI__Genius 13810 points

If PBIST_OVER=1, You select the RAM through PBIST_ALGO=0xE, (do not touch PBIST_RINFOL) and run the test, Done.

If PBIST_OVER=0, you have to do this in three steps.

1. PBIST_ALGO = 0x00000002, PBIST_RINFOL= 0x000003,run PBIST test for ROM;

2. PBIST_ALGO = 0x00000004, PBIST_RINFOL= 0x00000CC,run PBIsT test for single port ram;

3. PBIST_ALGO = 0x00000008, PBIST_RINFOL= 0x0000300,run PBIsT test for double port ram;

0 Haixiao Weng over 13 years ago in reply to Haixiao Weng

TI__Genius 13810 points

In another post, there is an example you can try.

http://e2e.ti.com/support/microcontrollers/hercules/f/312/t/123150.aspx

0 Chuck Wong over 13 years ago in reply to Haixiao Weng

Genius 3950 points

Haixiao Weng said:

If PBIST_OVER=0, you have to do this in three steps.

1. PBIST_ALGO = 0x00000002, PBIST_RINFOL= 0x000003,run PBIST test for ROM;

2. PBIST_ALGO = 0x00000004, PBIST_RINFOL= 0x00000CC,run PBIsT test for single port ram;

3. PBIST_ALGO = 0x00000008, PBIST_RINFOL= 0x0000300,run PBIsT test for double port ram;

In the meantime, I already did this but with PBIST_OVER default to 1 ... beautifully done! No more MCU error!

I will check the "without touching PBIST_ALGO" and will report back.

0 Chuck Wong over 13 years ago in reply to Haixiao Weng

Genius 3950 points

Haixiao Weng said:

If PBIST_OVER=1, You select the RAM through PBIST_RINFOL=0x3CF, (do not touch PBIST_ALGO) and run the test, Done.

Hi Haixiao,

This didn't work out for me. I put a breakpoint and verified all related registers just before writing 0x14 to PBIST_DLR to launch the self tests. After disabling PBIST by writing to PACT=0 and MSTGENA=5 registers, the MCU just keep resetting by going through again the C/C++ program entry point (even before main()).

And RGS/RDS is always equal to 5/0, which means MibSPI has failed.

I guess that I would have to stick with PBIST_OVER=1 and run three different set of tests successively (ROM, Single Port RAM, Two-Port RAM), as previously noted.

I appreciate very much your knowledgeable replies that help me resolve this issue quickly.

Regards,

Chuck.

0 Haixiao Weng over 13 years ago in reply to Chuck Wong

TI__Genius 13810 points

I made a mistake in the previous post and modified it with RED.

With over=1, you should select the algrithm, but don't touch the RAM settings. The engine will run the algrithm on all the RAMs (that can run this algrithm).

Sorry about that.

Haixiao

0 Chuck Wong over 13 years ago in reply to Haixiao Weng

Genius 3950 points

That makes sense (the red correction).

I see that you've put "Verified Answer" on the right post, and I concur with that!

Thanks again Haixiao.

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TMS570 PBIST self test