AM2434: am2434

Hi,

Baruch Einziger said:

My setup involves polling-mode UART transmission triggered by a 150 µs timer interrupt

For data transmit size of 256 bytes, what is the tx fifo trigger level size? Is it 16 bytes or 8 bytes?

Apart from this, if the baud rate is 3 M, have you confirmed if you are actually seeing 3 M on the line or not(via some waveform, logic analyzer).

Some calculations which will bridge the gap theroretically:

1200 bytes transmit with 3 M baudrate and default UART settings would mean about: 4 millisecond or 4000 microseconds.

(1 start bit + 8 data bits + no parity bits + 1 stop bits) =  10 data bits.

(1200 * 10) bits / 3000000 = 0.004 seconds or 4 milliseconds or 4000 microseconds.

Baruch Einziger said:

My setup involves polling-mode UART transmission triggered by a 150 µs timer interrupt

Giving the following setting would essentially mean every 15 microseconds, 1200 bytes are sent, but theory says it will take atleast 4000 microseconds.

Let me know your thoughts.

Regards,

Vaibhav

Hi Vaibhav

Your observations are accurate, except regarding the message length. For UART #4, my data size is 1200 bytes, and for UART #3, it is 1300 bytes. The transmitted data consists of an 8-bit counter cycling continuously from 0 to 0xFF until the end of the message.

I verified the transmission using an oscilloscope by connecting the TX lines directly to the RX lines. This testing was performed both on the standalone AM243X-LP board and on the AM243X-LP connected with my interface card (RS422). In both configurations, the results were very similar.

Regards,

Baruch

H Baruch,

Baruch Einziger said:

For UART #4, my data size is 1200 bytes, and for UART #3, it is 1300 bytes.

This is absolutely fine by me.

Vaibhav Kumar said:

Giving the following setting would essentially mean every 15 microseconds, 1200 bytes are sent, but theory says it will take atleast 4000 microseconds.

This is the only concern I am looking at. What do you think about this statement.

Regards,

Vaibhav

Hi Vaibhav,

I apologize for my delayed reply.

To clarify, the interrupt is a 150 µs timer interrupt, not a 15 µs one. With a baud rate of 3,000,000 bps, I can manage up to 45 characters per interrupt cycle.

I've implemented a state machine for UART transmission and reception, both activated by this 150 µs timer interrupt. Messages are read from an uncached shared buffer and written to a shared memory transmit buffer.

Currently, I’m using only core R00 for UDP 1GB/sec UDP communication and R01 for UART handling due to the internal RAM limitations of the AM243X-LP.

Regarding the UART error occurring at bit 4, it's unclear if this issue pertains to reception or transmission. However, as the error consistently occurs on every character after the initial incident (beyond approximately 1000 characters), I suspect it's likely a transmission-related error.

Thank you,

Baruch

Hi Baruch,

Baruch Einziger said:

With a baud rate of 3,000,000 bps

Please let me know if the setting for 3M UART Baud rate matches the one shown in the TRM, then we can proceed to debug further.

Looking forward to your response.

Thanks,

Vaibhav

Hi Vaibhav,

I've tested both the 48 MHz and 96 MHz clock options. In both cases, the baud rate remained identical, and the error persists.

Thanks,
Baruch

Hi Baruch,

Baruch Einziger said:

However, as the error consistently occurs on every character after the initial incident (beyond approximately 1000 characters), I suspect it's likely a transmission-related error.

Can you put some debug logs inside the UART_write/UART_read API to get markers onto where the failure is happening.

Let me know if you need any help with this.

Apart from this can you also try other modes of UART like polling mode?

Thanks,

Vaibhav

Hi Vaibhav,

I'm currently working in polling mode, directly accessing the UART registers.

In the transmit loop, I store the characters written to the UART in an array. I've confirmed there are no errors when filling the TX FIFO. During software development, I have connected the receiver line to the transmit line externally via the RS422 connector on the AM243x-LP, effectively looping the UART TX back to the UART RX.

However, I'm experiencing an issue in the transmit loop. The error consistently appears at the end of the message but doesn't occur at a fixed position. I've verified this directly in the buffers managed by the UART state machine and subsequently observed it when sending messages via UDP at 1 Gbps using Winsock.

Below are the typical loops used:

Transmit Loop:

tx_fifo_place = max_char_fifo_tx - UART_hwregs[uart_id]->TXFIFO_LVL;

if (tx_fifo_place < output_message_length[uart_id])
{
    for (send_index = 0; send_index < tx_fifo_place; send_index++)
    {
        tx_save_tx_buff[uart_id][tx_save_tx_buff_index[uart_id]++] = *uart_data_to_send[uart_id];
        UART_hwregs[uart_id]->RBR_THR_DLL = (uint32_t)*uart_data_to_send[uart_id]++;
    }
    output_message_length[uart_id] -= tx_fifo_place;
}

Receive Loop:

case normal_mode:

rx_fifo_place = UART_hwregs[uart_id]->RXFIFO_LVL;

if ((rx_fifo_place + input_buffer_cs_index[uart_id]) <= 1400)
{
    for (send_index = 0; send_index < rx_fifo_place; send_index++)
    {
        *uart_data_to_read[uart_id] = UART_hwregs[uart_id]->RBR_THR_DLL;
        rx_save_rx_buff[uart_id][rx_save_rx_buff_index[uart_id]++] = *uart_data_to_read[uart_id];
        input_buffer_cs[uart_id] += *uart_data_to_read[uart_id]++;
    }
    input_buffer_cs_index[uart_id] += rx_fifo_place;
}

Could you please advise on how to address this issue?

Best regards, Baruch

Hi,

Allow me sometime to get back to you.

Thanks,

Vaibhav

hi Vaibhav

thanls

baruch

Hi,

I am involved in some high priority issue, so please expect delayed responses on this thread.

Thanks for your patience.

Regards,

Vaibhav