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TM4C1294KCPDT: CAS latency

Part Number: TM4C1294KCPDT

Tool/software:

Hi team,

Can this device support CAS latency of 3 for external SDRAM ?

The customer would like to use SDRAM whose CL is 3 but they couldn't find the regisiter to change CL of EPI from 2 to 3.

Regards, 

Morita

  • Hi Morita-san,

      The CAS latency is fixed at 2 for TM4C129. We have tested the TM4C129 parts with MT48LC32M16A2TG-75 which supports the CAS Latency of 0x2

    11.5.2 SDRAM Mode
    When activating the SDRAM mode, it is important to consider a few points:
    1. Generally, it takes over 100 μs from when the mode is activated to when the first operation is
    allowed. The SDRAM controller begins the SDRAM initialization sequence as soon as the mode
    is selected and enabled via the EPICFG register. It is important that the GPIOs are properly
    configured before the SDRAM mode is enabled, as the EPI controller is relying on the GPIO
    block's ability to drive the pins immediately. As part of the initialization sequence, the LOAD
    MODE REGISTER command is automatically sent to the SDRAM with a value of 0x27, which
    sets a CAS latency of 2 and a full page burst length.