AM2432: SHA256 HMAC with core R5FSS1-0

Andrea Politano

Part Number: AM2432

Tool/software:

Hi,

I am using AM2432 with the Industrial SDK 11.00.00.08.

I want to use the SA2UL subsystem to calculate SHA256 HMAC in my multicore project.
I looked at the crypto_hmac_sha256 example project. My project requires the calculation to be done by core R5FSS1-0, but the example is for core R5FSS0-0.

I saw that the first part of opening firewall has to be done by core R5FSS0-0 (as written here), so I moved that part to core R5FSS0-0 (with FreeRTOS) and I made sure that it is done before accessing the SA2UL subsystem. Then I moved the part of using the SA2UL subsystem in core R5FSS1-0 (in bare-metal), but now when I execute hmacShaHandle = Crypto_open(&gCryptoHmacSha256Context); I get SystemP_FAILURE in status = SA2UL_open(0,&prms); and I get these errors:

What am I doing wrong? Can the SA2UL subsystem also be used by core R5FSS1-0? Instead if I keep everything in the core R5FSS0-0 I have no problem at all.

Thank you,

Kind Regards,

Andrea

5 months ago

+1 Prashant Shivhare 5 months ago

TI__Guru 74581 points

Hello,

The issue occurs because the SA2UL resources are not allocated to R5FSS1-0 core in the RM Board Configurations. The following patch for the MCU+ SDK moves the resources from R5FSS0-0 to R5FSS1-0 core.

diff --git a/source/drivers/sciclient/sciclient_default_boardcfg/am64x/sciclient_defaultBoardcfg_rm.c b/source/drivers/sciclient/sciclient_default_boardcfg/am64x/sciclient_defaultBoardcfg_rm.c
index eefced8e3..5604c23c9 100755
--- a/source/drivers/sciclient/sciclient_default_boardcfg/am64x/sciclient_defaultBoardcfg_rm.c
+++ b/source/drivers/sciclient/sciclient_default_boardcfg/am64x/sciclient_defaultBoardcfg_rm.c
@@ -731,7 +731,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_1_CHAN),
             .start_resource = 88,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -827,7 +827,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_2_CHAN),
             .start_resource = 152,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -929,7 +929,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 1,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_TX_1_CHAN),
             .start_resource = 25,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -1085,7 +1085,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 1,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN),
             .start_resource = 19,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -1097,7 +1097,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN),
             .start_resource = 40,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 1,
@@ -1109,7 +1109,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 1,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN),
             .start_resource = 20,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -1121,7 +1121,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN),
             .start_resource = 40,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 4,

After modifying the RM board configurations, make sure to rebuild the board configurations and then the SBL.

0 Andrea Politano 5 months ago in reply to Prashant Shivhare

Prodigy 190 points

Hi Prashant,

thank you for your response.

I made the changes and it works. My changes are for am243x as:

C:\am243x-mcu-plus-sdk\mcu_plus_sdk\source\drivers\sciclient\sciclient_default_boardcfg\am243x>git diff sciclient_defaultBoardcfg_rm.c
diff --git a/mcu_plus_sdk/source/drivers/sciclient/sciclient_default_boardcfg/am243x/sciclient_defaultBoardcfg_rm.c b/mcu_plus_sdk/source/drivers/sciclient/sciclient_default_boardcfg/am243x/sciclient_defaultBoardcfg_rm.c
index a51b52da..0cb828e1 100644
--- a/mcu_plus_sdk/source/drivers/sciclient/sciclient_default_boardcfg/am243x/sciclient_defaultBoardcfg_rm.c
+++ b/mcu_plus_sdk/source/drivers/sciclient/sciclient_default_boardcfg/am243x/sciclient_defaultBoardcfg_rm.c
@@ -671,7 +671,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_TX_1_CHAN),
             .start_resource = 88,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -761,7 +761,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_RING_SAUL_RX_2_CHAN),
             .start_resource = 152,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -857,7 +857,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 1,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_TX_1_CHAN),
             .start_resource = 25,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -1001,7 +1001,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 1,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_2_CHAN),
             .start_resource = 19,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
@@ -1013,7 +1013,7 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_2_CHAN),
             .start_resource = 40,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 1,
@@ -1025,13 +1025,13 @@ __attribute__(( aligned(128), section(".boardcfg_data") )) =
             .num_resource = 1,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_SAUL_RX_3_CHAN),
             .start_resource = 20,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_1,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 8,
             .type = TISCI_RESASG_UTYPE (TISCI_DEV_DMASS0_PKTDMA_0, TISCI_RESASG_SUBTYPE_PKTDMA_FLOW_SAUL_RX_3_CHAN),
             .start_resource = 40,
-            .host_id = TISCI_HOST_ID_MAIN_0_R5_0,
+            .host_id = TISCI_HOST_ID_MAIN_1_R5_1,
         },
         {
             .num_resource = 4,

I have a doubt though, is it right to edit with the TISCI_HOST_ID_MAIN_1_R5_1 when I then go to use SA2UL from core R5FSS1-0 and not from core R5FSS1-1?

Thank you,

Kind Regards,

Andrea

+1 Prashant Shivhare 5 months ago in reply to Andrea Politano

TI__Guru 74581 points

Hello,

Andrea Politano said:
I have a doubt though, is it right to edit with the TISCI_HOST_ID_MAIN_1_R5_1 when I then go to use SA2UL from core R5FSS1-0 and not from core R5FSS1-1?

Yes. The TISCI_HOST_ID_MAIN_1_R5_1 host id is the non-secure host id for the R5FSS1-0 core.

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AM2432: SHA256 HMAC with core R5FSS1-0