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LP-AM243: Cable redundancy support difference

Ted Huh
Intellectual 2985 points
Part Number: LP-AM243
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello Team,

When I look at the EtherCAT slave datasheet in the Industrial Comms SDK, I notice a difference in cable redundancy support.
It seems that only the AM243x EVM supports this feature, while the LP does not.
Could you let me know why?

Regards,

Ted

  • +1
    TI__Mastermind 47731 points
    Ted Huh said:
    I notice a difference in cable redundancy support.

    That limitation is only applicable for early revision of LP-AM243 due to lack of PHY LED_LINK/SPEED to MII_RXLINK connection. LP-AM243 E3 onwards supports it.

  • 0 in reply to PratheeshGangadhar
    TI__Intellectual 2985 points

    if customer follows below, will it work?

    Supported Combinations

    Parameter Value
    CPU + OS r5fss0-0 freertos
    ICSSG ICSSG1
    Toolchain ti-arm-clang
    Boards am243x-evm, am243x-lp (E3 Revision)
    Example folder examples/industrial_comms/ethercat_subdevice_demo

    As mentioned above, SDK example does not enable cable redundancy yet, but will work on E3 revision of am243x-lp only. For running it on E1/E2 revision, following changes are needed.

    • Disable the pinmux configuration for pins not available in E1/E2 revision
      • In "EtherCAT" module in SysConfig, uncheck following pins from PRU_ICSSG1_MII_G_RT.
        • MII0_RXER(PR1_MII0_RXER)
        • MII0_RXLINK(PR1_MII0_RXLINK)
        • MII1_RXER(PR1_MII1_RXER)
        • MII1_RXLINK(PR1_MII1_RXLINK)
    • Handle the pin assgnment change for PHY reset
      • In "GPIO" module in SysConfig, change the pin assignment of "CONFIG_GPIO0_PHYRESET0" from "W20" to "W11"

    Regards,

    Ted

  • +1 in reply to Ted Huh
    TI__Genius 9105 points

    Hi Ted,

    If the customer is using E1 or E2 revision, the above changes along with Disabling enhanced link detection is needed:

    For Rev E3, the example will work out of box.

    Regards,
    Aaron

  • 0 in reply to Aaron Thomas
    TI__Intellectual 2985 points

    Hello Aaron,

    Is this indicated in SDK docs?(HTML)

    I can't find this comment

    Regards,

    Ted

  • +1 in reply to Ted Huh
    TI__Genius 9105 points

    Hi Ted,

    I'm referring to the latest SDK documentation : EtherCAT SubDevice Beckhoff SSC Demo v11.00

    Regards,
    Aaron

  • 0 in reply to Aaron Thomas
    TI__Intellectual 2985 points

    Hi Aaron,

    if they disable the enhanced link detection, will there be the difference on performance?

    Regards,

    Ted

  • +1 in reply to Ted Huh
    TI__Genius 9105 points

    Hi Ted,

    The link status can be determined by using the MLINK input pin or the MDIO internal state machine, depending on the LINKSEL bit in the MDIOUSERPHYSELn register. The MDIO state machine-based detection is slow due to a serial link for messaging from the MDIO controller to the PHYs, which typically takes from 200 to 250 µs.

    MLINK/mii_rxlink detection occurs as fast as the PHY can toggle the link and typically within 10 µs, provided by the advanced link-down capability of the PHY.

    From EtherCAT functionality point, there won't be any difference in performance. This is needed for fast link detection and for testing cable redundancy (feature which ensures that all SubDevices are accessible even if there is a single link break in the network between two ports of MainDevice).

    Regards,
    Aaron