AM2432: Unexpected GPIO behavior after SPI boot

Hi Oyama-san,

I don't know why Y4 (GPIO1_32) would be configured by ROM code. It could be something related to UART4_TX , however normally ROM uses only UART0 for loading boot image... At least this is not a documented behavior.

However, I noticed that you might be selecting UART boot instead of xSPI for Case 2. See below:

Case 1:

BOOTMODE is set as follows 15:0 (00 0110 000 0011 011).

Backup = SPI  |  Mode=0, CS=0  | Primary = SPI | 25 MHz XTAL

Case 2:

BOOTMODE is set as follows 15:0 (00 0110 000 0111 011).

Backup = SPI  |  Mode=0, CS=0  | Primary = UART | 25 MHz XTAL

Please refer to AM64x/AM243x Technical Reference Manual (Rev. H) Section 4.3.1 BOOTMODE Pin Mapping

Please let me know if changing BOOTMODE[6:3] pins to 1110 = xSPI solves the issue with Y4 (GPIO1_32).

Thanks,

Stan

Oyama-san,

Sorry, I didn't realize you are seeing issue with Case 1 - SPI boot and not with Case 2.

Can you please double check then:

- You are seeing Y4 (PRG0_PRU1_GPO12)  pin activity during SPI boot: Y/N

- You are seeing Y4 (PRG0_PRU1_GPO12)  pin activity during UART boot: Y/N

- You are seeing Y4 (PRG0_PRU1_GPO12)  pin activity during xSPI boot: Y/N

Thanks,

Stan

Hi Stan,

Tomoya Oyama said:

if I set the boot mode to xSPI, it works fine.

BOOTMODE is set as follows 15:0 (0001 1000 0011 1011).

This is incorrect, the correct statement is as follows: (00 0110 000 1110 011)

- I saw Y4 (PRG0_PRU1_GPO12)  pin activity during SPI boot: Y

- I saw Y4 (PRG0_PRU1_GPO12)  pin activity during UART boot: N

- I saw Y4 (PRG0_PRU1_GPO12)  pin activity during xSPI boot: Y

Best regard,

oyama

Oyama-san,

We are checking this internally. Please expect 1-2 working days delay.\

Thanks,

Stan

Oyama-san,

Confirmed with the ROM code that no changes were done to PRG0_PRU1_GPO12/ PADCONFIG120 (as shown in the below image) during the entire boot process, so we suspect that there might be an issue due to some other reason and would request you to capture the SPI signals corresponding to the images loaded and time taken.

Regards,

Trupthi

Hi,

I pictured Y4 and Flash Chip select (OSPI0_CSn0), with white arrows indicating same points of application.

SPI mode

xSPI mode

Best regard,

oyama

Hello Oyama-san,

Can you please confirm the package you are using - ALX?

Regards,

Sreenivasa

Hi,

Yes, I use ALX package.

Hello Oyama-san,

Thank you for the inputs.

Regards,

Sreenivasa

Hello Oyama-san,

We tested with the below configuration and do not see any activity on the GPIO.

AM243x SPI (15:0): 0000 0000 0001 1011

AM243x QSPI (15:0): 0000 0001 0001 0011

AM243x xSPI (15:0): 0000 0000 0111 0011

AM64x EVM SPI (15:0): 0001 1000 0001 1011

AM64x EVM xSPI (15:0): 0001 1000 0111 0011

 custom board with AM2432 ALX

Booting is performed using SPI Flash (1S-1S-1S), and the CPU starts up normally.

BOOTMODE is set as follows 15:0 (0001 1000 0001 1011).

At this time, when the main power is turned on, the pulled-up GPO (Y4) will drop automatically.

However, if I set the boot mode to xSPI, it works fine.

BOOTMODE is set as follows 15:0 (0001 1000 0011 1011).

Refer below assesment by the team

The AM243x LaunchPad does not have the option to configure secondary bootmode via switch and so any secondary bootmode settings would need to be done with a hardware mod. I don’t believe that secondary bootmode would have any impact on the Y4 pad as the secondary bootmode option of SPI does not make use of any signals muxed on Y4.

“However, if I set the boot mode to xSPI, it works fine. BOOTMODE is set as follows 15:0 (0001 1000 0011 1011).” Note that this bootmode string is for UART primary boot.

• Since there is some potential confusion on bootmode values for primary bootmode settings, it is possible that the customer has the orientation for primary bootmode flipped.
  • I.E. xSPI boot should be B[3:6] = 0111 and the e2e thread cites xSPI boot as 1110 (UART boot)
  • If this is true, the customer is configuring GPMC NOR boot rather than SPI boot
    • In GPMC NOR boot, Y4 is used for GPMC0_A1 which could be holding the signal low despite the external pull up.
    • Karam observed no behavior on Y4 with GPMC NOR boot but we did not have an external pull up on the line.

Would you able to share the relevant schematics for me to do a quick check.

Regards,

Sreenivasa

Hi,

I was confusing SPI boot with GPMC NOR boot.

I didn't notice this because my board still works in GPMC boot mode.

Thank you for identifying the cause of this issue.

Best regard,

oyama