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MCU-PLUS-SDK-AM243X: CSS: Launch Load and Run Error

Part Number: MCU-PLUS-SDK-AM243X


Tool/software:

Hello! I am currently working on the Launch Load and Run process for the USB CDC Echo example, but I am running into the following issue: 

For some reason, pausing does not work despite being disconnected and when going to reset, the reset CPU option is grayed out/inaccessible. I know this is the next step in the process (links posted below for quick searching), so I am a bit stuck on how to work around this. Is the CPU having an issue, or is this a CCS error?

Also, if for the USB example, would the MAIN_Cortex_R5_0_0 still be the correct one to use (to be clear, though, all others have the same issue as above)?

I am also connected to the UART + JTAG, but unsure if J24 connection (currently disconnected) would be a possible issue.

Links:

AM243x MCU+ SDK: CCS Launch, Load and Run

AM243x MCU+ SDK: USB CDC Echo Example

Thank you!

  • It is not possible to reset the core when it is disconnected.  To reset a core you need to be connected to it.  On AM243x when disconnected from a core the only reset options available will be a system reset and emulator reset.

    For example here I am disconnected from the first Cortex R5.  I am not able to do a CPU Reset.

    However if I connect first I will then be able to do a CPU Reset:

    Looking at the link you provided I believe you missed the step in the 3rd bullet to connect.

    I am going to loop in the AM243x team who can provide further assistance.

    Regards,

    John

  • Hi John, 

    All the CPU related operations like halting the CPU, running the CPU core and doing a CPU reset are only available when the core is connected.

    If the core is disconnected all the above mentioned options will be grayed out. This is expected behavior.

    Regards,

    Tushar

  • Hello! 

    Thank you for your help (and I see now that I have sweeped over the connected note).

    However, I tried connecting the board and depower-ing/re-powering and then restarting CCS to try to connect it, but I am currently getting this issue that's still preventing the next step:

    I believe I have also reset the board and it's still not working, is there anything else I should look at?

    Thank you!

  • Hi,

    Please confirm, Is the board initialized properly via the SBL binaries?

    Are you able to see the bootloader logs on UART console when doing power cycle?

    Regards,

    Tushar

  • Hello!

    I believe that it was initialized properly as all steps were followed as per the website instructions, though please let me know if there are other resources I should have looked at (how I know is when I opened the UART terminal, c's were printed out as the SBL binary info page states for the UART Boot mode, which I understand is what you mean by the bootloader logs on the UART console). 

    Thank you,

    Jieun Lim

  • Hi Jieun,

    which I understand is what you mean by the bootloader logs on the UART console

    No, you should see the logs similar to below shared logs. The C character you are getting are coming from the ROM code.

    Starting NULL Bootloader ...
    
      DMSC Firmware Version 21.1.1--v2021.01a (Terrific Lla
      DMSC Firmware revision 0x15
      DMSC ABI revision 3.1
    
      INFO: Bootloader_runCpu:151: CPU r5f1-0  is initialized to 800000000 Hz !!!
      INFO: Bootloader_runCpu:151: CPU r5f1-1 is initialized to 800000000 Hz !!!
      INFO: Bootloader_runCpu:151: CPU m4f0-0 is initialized to 400000000 Hz !!!
      INFO: Bootloader_loadSelfCpu:203: CPU r5f0-0 is initialized to 800000000 Hz !!!
      INFO: Bootloader_loadSelfCpu:203: CPU r5f0-1 is initialized to 800000000 Hz !!!
      INFO: Bootloader_runSelfCpu:215: All done, reseting self ...

    Please follow the steps mentioned at Flash SOC Binary and change the boot mode to OSPI as mentioned. Once you see the logs similar to above, you should be able to connect with cores.

    Regards,

    Tushar

  • Hello!

    Thank you for your help! Just to make sure, is there a reason why it's not the UART boot mode, but the OSPI for the USB CDC project? 

    Thank you,

    Jieun Lim

  • Hi Jieun,

    When the EVM is in UART boot mode, there is only ROM code which is running till now. Alll the cores of SOC has not initialized yet and the peripheral like DDR has also not initialized. You need an SBL binary that will initialize the SOC cores and also peripherals like DDR, OSPI etc.

    So you flash the SBL binaries on OSPI memory using UART boot media. When you keep the board in OSPI boot mode, the SBL binary is then read from OSPI memory and load & run from R5F0-0 core. The SBL binary then initializes the other cores and peripherals.   

    For more information on bootloaders, please refer BOOTFLOW_GUIDE 

    Regards,

    Tushar