TMS570LS1227: Unexpected B1_UNC_ERR Set During BUS2 ECC Diagnostic Mode 1 on TMS570LS1227

Tool/software:

We are executing ECC diagnostic testing on the TMS570LS1227 (Rev C) using Diagnostic Mode 1 on BUS2 only, following the standard procedure documented in the TRM (SPNU515C, Section 5.6.2 and 5.7.26–5.7.27):

• FDIAGCTRL is configured with ECC_SEL = 0x4 (BUS2) and MODE = 1

• A 2-bit error is injected in the FEMUDLSW field

• FEMUECC is preloaded with the valid ECC for the original data

• FlashTriggerDiag() is used to initiate the diagnostic

• FEDACSTATUS is then checked

Expected Behavior:

• D_UNC_ERR and B2_UNC_ERR flags should be set

Actual Behavior:

• In addition to the expected flags, the B1_UNC_ERR flag is also being set

• No writes or test actions were directed toward any BUS1-mapped address

• FEMUADDR is set to a valid BUS2-mapped Flash region

We have:

• Cleared all ECC flags beforehand using FEDACSTATUS

• Verified test address falls into BUS2-mapped bank

• Observed the issue consistently on multiple boards with Rev C silicon

Request:

• Is this a known silicon erratum or undocumented behavior?

• Could internal FEDAC logic be cross-flagging BUS1 erroneously during BUS2 diagnostics?

• Any recommended workaround to isolate this or ignore B1_UNC_ERR in this context?

Thanks in advance.