Tool/software:
Hello Support team,
I'm working on the AM273x EVM with MCU+ SDK. It seems to me that the MSS_SPIB mode setting in the example.syscfg of the sample mibspi_loopback project does not match with the actual SPI signals on J7 of EVM. I verified this with Saleae Logic 2.
For example, for AD7380-4 chipset, the SPI mode is 2 (CPOL = 1, CPHA = 0), in the AM273x .syscfg file I have to set to mode 3 (CPOL = 1, CPHA = 1).
Is there any reason for that? Or any suggestion?
Best regards,
Lin
Lin,
Looking at the AD7380-4 datasheet, it appears that the expectation for MOSI (data from AM273 to AD7380) is that the data is read on the falling falling edge of CLK and changed on the rising edge of CLK. This corresponds with a configuration of Polarity = 1 and Phase = 1 on the AM273.
However, for MISO (data from AD7380 to AM273), it appears the expectation is that the data is read on a rising edge and changes on a falling edge of CLK. This corresponds with an AM273 configuration of Polarity = 1 and Phase = 0 on the AM273.
AD7380 datasheet:
Since the phase is different based on whether you care about MOSI or MISO, the software would need to select the correct configuration for Phase that matches the direction you are trying to send data.
However, it might be worth sending a note to Analog Devices and asking them why their part uses different clock phases for spi data out and spi data in...
Thanks,
Mike
