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MSPM0C1106: Question regarding GPIO, UART interrupt, I2C read/right during interrupt

Part Number: MSPM0C1106
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hi 

My customer got two questions, can you help comment ? thanks!

  1. We may need to enable GPIO edge and UART Rx interrupts, with GPIO interrupt having higher priority than UART. Does the system support interrupt priority levels?
  2. We might perform I2C transfers (read/write to a specific device) inside a GPIO interrupt. Is this safe, especially if a device issue causes I2C failure? We prefer not to use an RTOS.
  • Hello PYTsai,

    Does the system support interrupt priority levels?

    Yes.  Here is a table of interrupt priorities for this device.  The smaller the NVIC IRQ#, the higher the priority.

     You can find more detailed information about interrupts in the TRM, section 3.3.1 (note: this is TRM for C1103/4 and will updated soon.  In mean time description of interrupts applies to C1105/6)

    In your scenario, yes you will need to set the priorities for GPIO and UART accordingly. This is done easily in the Sysconfig tool as shown here.  Note, there a 4-levels of priority.  Based on your description you need I2C to be the highest, next is GPIO, then last UART. Since the default order has UART the highest, then GPIO, then I2C, you could try assigning the highest level to I2C, high level to GPIO and low level to UART.

    Regarding #2

    We might perform I2C transfers (read/write to a specific device) inside a GPIO interrupt. Is this safe, especially if a device issue causes I2C failure?

    Yes, but inside your I2C handler "foreground" you will need to handle such error, and if somewhere back in main() or the "background" it needs to know, you will need to set some global flag to notify the background.

    And no, an RTOS is not necessary.

    I hope this helps ;)