Other Parts Discussed in Thread: HALCOGEN, TMS570LC4357
Tool/software:
I have a PGE (144 pin) version of the chip if it matters. SPI5 ENA appears on pin 97 (if you have the correct pin mux set). But for me, pin 97 is not yet connected. I wanted to ensure that I could use ENA as a GIO pin and could not make it work with HalCoGen. So I wrote this bit of code:
spiREG5->PC0 = 0;
spiREG5->PC1 = 0xfff;
spiREG5->PC3 = 0;
printf("SPI5 after 0 to PC3: PC0: %x, PC1: %x, PC2: %x, PC3: %x\n",spiREG5->PC0,spiREG5->PC1,spiREG5->PC2,spiREG5->PC3);
spiREG5->PC4 = 0xfff;
printf("SPI5 after fff to PC4: PC0: %x, PC1: %x, PC2: %x, PC3: %x\n",spiREG5->PC0,spiREG5->PC1,spiREG5->PC2,spiREG5->PC3);
printf("Single bits Ena and Clock: %d %d\n",gioGetBit(spiPORT5,8),gioGetBit(spiPORT5,9));
The result was:
SPI5 after 0 to PC3: PC0: 0, PC1: 1010f0f, PC2: 0, PC3: 0
SPI5 after fff to PC4: PC0: 0, PC1: 1010f0f, PC2: 1010e0f, PC3: 1010f0f
Single bits Ena and Clock: 0 1
In other words, PC0 is set for all SPI5 pins to be GIO, PC1 was set for all pins from SCS0 to SOMI0 (and one unused) pin to be output. Writing 1 to DOUT in fact sets all
the bits when I read DOUT back. However, given that this is an in/out GIO, I would expect to get the same result back on DIN, and in fact I do for all the implemented SCS lines
and the clock line. But not ENABLE. Unfortunately, I need another GIO pin, and ENABLE is the one that is available on the package. Why is it different from all the rest of the SPI pins?



