AM2432: AM2432 MCU SDK vs Industrial SDK enet_layer2_icssg example

It seems to be failing at enet_open in sysconfig/ti_enet_open_close.c.

The sysconfig settings I'm using are as follows:

Regardless of the MCU or IND SDK, it seems to fail at enet_open in sysconfig/ti_enet_open_close.c in higher versions. The debug log is below.

==========================
MULTIPORT TEST
==========================

Init all peripheral clocks
----------------------------------------------
Enabling clocks!

Open all peripherals
----------------------------------------------
EnetAppUtils_reduceCoreMacAllocation: Reduced Mac Address Allocation for CoreId:1 From 4 To 1

Init configs EnetType:2, InstId :1
----------------------------------------------
EnetUdma_openRxCh:2328
EnetUdma_openRxCh:2328
EnetHostPortDma_open:121
Icssg_openDma:747
Icssg_open:1090
EnetPer_open:1231
Enet_open:933
Enet_open failed
Assertion @ Line: 324 in syscfg/ti_enet_open_close.c: hEnet != NULL_PTR : failed !!!

The sysconfig settings in use are as follows:

/**
* These arguments were used when this file was generated. They will be automatically applied on subsequent loads
* via the GUI or CLI. Run CLI with '--help' for additional information on how to override these arguments.
* @cliArgs --device "AM243x_ALX_beta" --part "ALX" --package "ALX" --context "r5fss0-0" --product "INDUSTRIAL_COMMUNICATIONS_SDK_AM243x@11.00.00"
* @v2CliArgs --device "AM2434" --package "FCCSP (ALX)" --context "r5fss0-0" --product "INDUSTRIAL_COMMUNICATIONS_SDK_AM243x@11.00.00"
* @versions {"tool":"1.22.0+3893"}
*/

/**
* Import the modules used in this configuration.
*/
const pruicss = scripting.addModule("/drivers/pruicss/pruicss", {}, false);
const pruicss1 = pruicss.addInstance();
const udma = scripting.addModule("/drivers/udma/udma", {}, false);
const udma2 = udma.addInstance();
const clock = scripting.addModule("/kernel/dpl/clock");
const debug_log = scripting.addModule("/kernel/dpl/debug_log");
const mpu_armv7 = scripting.addModule("/kernel/dpl/mpu_armv7", {}, false);
const mpu_armv71 = mpu_armv7.addInstance();
const mpu_armv72 = mpu_armv7.addInstance();
const mpu_armv73 = mpu_armv7.addInstance();
const mpu_armv74 = mpu_armv7.addInstance();
const mpu_armv75 = mpu_armv7.addInstance();
const mpu_armv76 = mpu_armv7.addInstance();
const mpu_armv77 = mpu_armv7.addInstance();
const timer = scripting.addModule("/kernel/dpl/timer", {}, false);
const timer1 = timer.addInstance();
const timer2 = timer.addInstance();
const timer3 = timer.addInstance();
const timer4 = timer.addInstance();
const timer5 = timer.addInstance();
const enet_icss = scripting.addModule("/networking/enet_icss/enet_icss", {}, false);
const enet_icss1 = enet_icss.addInstance();

/**
* Write custom configuration values to the imported modules.
*/
udma2.$name = "CONFIG_UDMA1";

debug_log.enableUartLog = true;
debug_log.enableCssLog = false;
debug_log.uartLog.$name = "CONFIG_UART_CONSOLE";
debug_log.uartLog.UART.$assign = "USART0";

const uart_v0_template = scripting.addModule("/drivers/uart/v0/uart_v0_template", {}, false);
const uart_v0_template1 = uart_v0_template.addInstance({}, false);
uart_v0_template1.$name = "drivers_uart_v0_uart_v0_template0";
debug_log.uartLog.child = uart_v0_template1;

mpu_armv71.$name = "CONFIG_MPU_REGION0";
mpu_armv71.size = 31;
mpu_armv71.attributes = "Device";
mpu_armv71.allowExecute = false;
mpu_armv71.accessPermissions = "Supervisor RD+WR, User RD";

mpu_armv72.$name = "CONFIG_MPU_REGION1";
mpu_armv72.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv72.size = 16;

mpu_armv73.$name = "CONFIG_MPU_REGION2";
mpu_armv73.baseAddr = 0x41010000;
mpu_armv73.size = 16;

mpu_armv74.$name = "CONFIG_MPU_REGION3";
mpu_armv74.baseAddr = 0x70000000;
mpu_armv74.size = 21;

mpu_armv75.$name = "CONFIG_MPU_REGION5";
mpu_armv75.baseAddr = 0xA5000000;
mpu_armv75.size = 23;
mpu_armv75.accessPermissions = "Supervisor RD+WR, User RD";
mpu_armv75.attributes = "NonCached";

mpu_armv76.$name = "CONFIG_MPU_REGION6";
mpu_armv76.baseAddr = 0x5000000;
mpu_armv76.size = 19;

mpu_armv77.$name = "CONFIG_MPU_REGION4";
mpu_armv77.baseAddr = 0x20700000;
mpu_armv77.size = 16;
mpu_armv77.attributes = "Device";

timer1.$name = "CONFIG_TIMER0";
timer1.timerInputClkHz = 200000000;
timer1.clkSource = "MAIN_PLL0_HSDIV7_CLKOUT";

timer2.$name = "CONFIG_TIMER1";
timer2.timerInputClkHz = 200000000;
timer2.clkSource = "MAIN_PLL0_HSDIV7_CLKOUT";
timer2.TIMER.$assign = "DMTIMER4";

timer3.$name = "CONFIG_TIMER2";
timer3.timerInputClkHz = 200000000;
timer3.clkSource = "MAIN_PLL0_HSDIV7_CLKOUT";
timer3.TIMER.$assign = "DMTIMER3";

timer4.$name = "CONFIG_TIMER3";
timer4.timerInputClkHz = 200000000;
timer4.clkSource = "MAIN_PLL0_HSDIV7_CLKOUT";
timer4.TIMER.$assign = "DMTIMER2";

timer5.$name = "CONFIG_TIMER4";
timer5.timerInputClkHz = 200000000;
timer5.clkSource = "MAIN_PLL0_HSDIV7_CLKOUT";
timer5.TIMER.$assign = "DMTIMER1";

enet_icss1.$name = "CONFIG_ENET_ICSS0";
enet_icss1.macAddrConfig = "Manual Entry";
enet_icss1.QoS = 3;
enet_icss1.LargePoolPktCount = 24;
enet_icss1.phyToMacInterfaceMode = "RGMII";
enet_icss1.GigabitSupportEnable = false;
enet_icss1.customBoardEnable = true;
enet_icss1.mdioMode = "MDIO_MODE_MANUAL";
enet_icss1.txDmaChannel[0].$name = "ENET_DMA_TX_CH0";
enet_icss1.txDmaChannel[0].PacketsCount = 8;
enet_icss1.rxDmaChannel[0].$name = "ENET_DMA_RX_CH0";
enet_icss1.rxDmaChannel[0].PacketsCount = 8;
enet_icss1.rxDmaChannel[1].$name = "ENET_DMA_RX_CH1";
enet_icss1.rxDmaChannel[1].PacketsCount = 8;
enet_icss1.rxDmaChannel[1].macAddrCount = 0;
enet_icss1.rxDmaChannel[1].chIdx = 1;
enet_icss1.PRU_ICSSG1_RGMII2.$assign = "PRU_ICSSG1_RGMII2";

enet_icss1.icss = pruicss1;
pruicss1.$name = "CONFIG_PRU_ICSS1";
pruicss1.AdditionalICSSSettings[0].$name = "CONFIG_PRU_ICSS_IO1";
pruicss1.intcMapping.create(2);
pruicss1.intcMapping[0].$name = "CONFIG_ICSS1_INTC_MAPPING0";
pruicss1.intcMapping[0].event = "41";
pruicss1.intcMapping[0].channel = "7";
pruicss1.intcMapping[0].host = "8";
pruicss1.intcMapping[1].$name = "CONFIG_ICSS1_INTC_MAPPING1";
pruicss1.intcMapping[1].event = "53";
pruicss1.intcMapping[1].channel = "7";
pruicss1.intcMapping[1].host = "8";

const udma1 = udma.addInstance({}, false);
enet_icss1.udmaDrv = udma1;

/**
* Pinmux solution for unlocked pins/peripherals. This ensures that minor changes to the automatic solver in a future
* version of the tool will not impact the pinmux you originally saw. These lines can be completely deleted in order to
* re-solve from scratch.
*/
debug_log.uartLog.UART.RXD.$suggestSolution = "UART0_RXD";
debug_log.uartLog.UART.TXD.$suggestSolution = "UART0_TXD";
timer1.TIMER.$suggestSolution = "DMTIMER0";
enet_icss1.PRU_ICSSG1_MDIO.$suggestSolution = "PRU_ICSSG1_MDIO0";
enet_icss1.PRU_ICSSG1_MDIO.MDC.$suggestSolution = "PRG1_MDIO0_MDC";
enet_icss1.PRU_ICSSG1_MDIO.MDIO.$suggestSolution = "PRG1_MDIO0_MDIO";
enet_icss1.PRU_ICSSG1_IEP.$suggestSolution = "PRU_ICSSG1_IEP0";
enet_icss1.PRU_ICSSG1_IEP.EDC_LATCH_IN0.$suggestSolution = "PRG1_PRU0_GPO18";
enet_icss1.PRU_ICSSG1_IEP.EDC_SYNC_OUT0.$suggestSolution = "PRG1_PRU0_GPO19";
enet_icss1.PRU_ICSSG1_RGMII1.$suggestSolution = "PRU_ICSSG1_RGMII1";
enet_icss1.PRU_ICSSG1_RGMII1.RD0.$suggestSolution = "PRG1_PRU0_GPO0";
enet_icss1.PRU_ICSSG1_RGMII1.RD1.$suggestSolution = "PRG1_PRU0_GPO1";
enet_icss1.PRU_ICSSG1_RGMII1.RD2.$suggestSolution = "PRG1_PRU0_GPO2";
enet_icss1.PRU_ICSSG1_RGMII1.RD3.$suggestSolution = "PRG1_PRU0_GPO3";
enet_icss1.PRU_ICSSG1_RGMII1.RXC.$suggestSolution = "PRG1_PRU0_GPO6";
enet_icss1.PRU_ICSSG1_RGMII1.RX_CTL.$suggestSolution = "PRG1_PRU0_GPO4";
enet_icss1.PRU_ICSSG1_RGMII1.TD0.$suggestSolution = "PRG1_PRU0_GPO11";
enet_icss1.PRU_ICSSG1_RGMII1.TD1.$suggestSolution = "PRG1_PRU0_GPO12";
enet_icss1.PRU_ICSSG1_RGMII1.TD2.$suggestSolution = "PRG1_PRU0_GPO13";
enet_icss1.PRU_ICSSG1_RGMII1.TD3.$suggestSolution = "PRG1_PRU0_GPO14";
enet_icss1.PRU_ICSSG1_RGMII1.TXC.$suggestSolution = "PRG1_PRU0_GPO16";
enet_icss1.PRU_ICSSG1_RGMII1.TX_CTL.$suggestSolution = "PRG1_PRU0_GPO15";
enet_icss1.PRU_ICSSG1_RGMII2.RD0.$suggestSolution = "PRG1_PRU1_GPO0";
enet_icss1.PRU_ICSSG1_RGMII2.RD1.$suggestSolution = "PRG1_PRU1_GPO1";
enet_icss1.PRU_ICSSG1_RGMII2.RD2.$suggestSolution = "PRG1_PRU1_GPO2";
enet_icss1.PRU_ICSSG1_RGMII2.RD3.$suggestSolution = "PRG1_PRU1_GPO3";
enet_icss1.PRU_ICSSG1_RGMII2.RXC.$suggestSolution = "PRG1_PRU1_GPO6";
enet_icss1.PRU_ICSSG1_RGMII2.RX_CTL.$suggestSolution = "PRG1_PRU1_GPO4";
enet_icss1.PRU_ICSSG1_RGMII2.TD0.$suggestSolution = "PRG1_PRU1_GPO11";
enet_icss1.PRU_ICSSG1_RGMII2.TD1.$suggestSolution = "PRG1_PRU1_GPO12";
enet_icss1.PRU_ICSSG1_RGMII2.TD2.$suggestSolution = "PRG1_PRU1_GPO13";
enet_icss1.PRU_ICSSG1_RGMII2.TD3.$suggestSolution = "PRG1_PRU1_GPO14";
enet_icss1.PRU_ICSSG1_RGMII2.TXC.$suggestSolution = "PRG1_PRU1_GPO16";
enet_icss1.PRU_ICSSG1_RGMII2.TX_CTL.$suggestSolution = "PRG1_PRU1_GPO15";

Is there anything I'm missing or making a mistake?

Additionally, I use the dp83822 phy.

For the custom board, I use enet_custom_board_config.c as follows:

#include <stdint.h>
#include <enet.h>
#include <networking/enet/core/include/phy/enetphy.h>
#include <dp83822.h>
#include <enet_apputils.h>
#include <kernel/dpl/SystemP.h>
#include <kernel/dpl/AddrTranslateP.h>
#include <networking/enet/core/src/phy/enetphy_priv.h>
#include "ti_board_open_close.h"
#include "ti_drivers_config.h"
#include "ti_board_config.h"
#include <kernel/dpl/AddrTranslateP.h>

/* PHY drivers */
extern Phy_DrvObj_t gEnetPhyDrvDp83822;
extern Phy_DrvObj_t gEnetPhyDrvGeneric;
/* ========================================================================== */
/* Macros & Typedefs */
/* ========================================================================== */

/* ========================================================================== */
/* Structure Declarations */
/* ========================================================================== */
/*! \brief All the registered PHY specific drivers. */
static const EthPhyDrv_If gEnetPhyDrvs[] =
{
&gEnetPhyDrvDp83822, /* DP83822 */
&gEnetPhyDrvGeneric, /* Generic PHY - must be last */
};

const EnetPhy_DrvInfoTbl gEnetPhyDrvTbl =
{
.numHandles = ENET_ARRAYSIZE(gEnetPhyDrvs),
.hPhyDrvList = gEnetPhyDrvs,
};

/* ========================================================================== */
/* Function Declarations */
/* ========================================================================== */

static const EnetBoard_PortCfg *EnetBoard_getPortCfg(const EnetBoard_EthPort *ethPort);

static const EnetBoard_PortCfg *EnetBoard_findPortCfg(const EnetBoard_EthPort *ethPort,
const EnetBoard_PortCfg *ethPortCfgs,
uint32_t numEthPorts);

static void EnetBoard_setEnetControl(Enet_Type enetType,
Enet_MacPort macPort,
EnetMacPort_Interface *mii);

/* ========================================================================== */
/* Global Variables */
/* ========================================================================== */

static const Dp83822_Cfg gEnetCpbBoard_dp83822PhyCfg =
{
#if 0
.txClkShiftEn = true,
.rxClkShiftEn = true,
#endif
};

/*
* AM64x board configuration.
*
* 1 x RGMII PHY connected to AM64x CPSW_2G MAC port.
*/
static const EnetBoard_PortCfg gEnetCpbBoard_am64xEthPort[] =
{
{ /* "ETH2" (ICSSG1 Switch port 1) */
.enetType = ENET_ICSSG_SWITCH,
.instId = 1U,
.mii = { ENET_MAC_LAYER_GMII, ENET_MAC_SUBLAYER_REDUCED },
.macPort = ENET_MAC_PORT_1,
.phyCfg =
{
.phyAddr = 0x3U,
.isStrapped = false,
.skipExtendedCfg = false,
.extendedCfg = &gEnetCpbBoard_dp83822PhyCfg,
.extendedCfgSize = sizeof(gEnetCpbBoard_dp83822PhyCfg),
},
.flags = 0U,
},
{ /* "ETH3" (ICSSG1 Switch port 2) */
.enetType = ENET_ICSSG_SWITCH,
.instId = 1U,
.macPort = ENET_MAC_PORT_2,
.mii = { ENET_MAC_LAYER_GMII, ENET_MAC_SUBLAYER_REDUCED },
.phyCfg =
{
.phyAddr = 0x1U,
.isStrapped = false,
.skipExtendedCfg = false,
.extendedCfg = &gEnetCpbBoard_dp83822PhyCfg,
.extendedCfgSize = sizeof(gEnetCpbBoard_dp83822PhyCfg),
},
.flags = 0U,
},
};

/* ========================================================================== */
/* Function Definitions */
/* ========================================================================== */

const EnetBoard_PhyCfg *EnetBoard_getPhyCfg(const EnetBoard_EthPort *ethPort)
{
const EnetBoard_PortCfg *portCfg;

portCfg = EnetBoard_getPortCfg(ethPort);

return (portCfg != NULL) ? &portCfg->phyCfg : NULL;
}

static const EnetBoard_PortCfg *EnetBoard_getPortCfg(const EnetBoard_EthPort *ethPort)
{
const EnetBoard_PortCfg *portCfg = NULL;

portCfg = EnetBoard_findPortCfg(ethPort,
gEnetCpbBoard_am64xEthPort,
ENETPHY_ARRAYSIZE(gEnetCpbBoard_am64xEthPort));

return portCfg;
}

static const EnetBoard_PortCfg *EnetBoard_findPortCfg(const EnetBoard_EthPort *ethPort,
const EnetBoard_PortCfg *ethPortCfgs,
uint32_t numEthPorts)
{
const EnetBoard_PortCfg *ethPortCfg = NULL;
bool found = false;
uint32_t i;

for (i = 0U; i < numEthPorts; i++)
{
ethPortCfg = &ethPortCfgs[i];

if ((ethPortCfg->enetType == ethPort->enetType) &&
(ethPortCfg->instId == ethPort->instId) &&
(ethPortCfg->macPort == ethPort->macPort) &&
(ethPortCfg->mii.layerType == ethPort->mii.layerType) &&
(ethPortCfg->mii.sublayerType == ethPort->mii.sublayerType))
{
found = true;
break;
}
}

return found ? ethPortCfg : NULL;
}

int32_t EnetBoard_setupPorts(EnetBoard_EthPort *ethPorts,
uint32_t numEthPorts)
{
uint32_t i;

/* Nothing else to do */
for (i = 0U; i < numEthPorts; i++)
{
EnetBoard_EthPort *ethPort = &ethPorts[i];
/* Override the ENET control set by board lib */
EnetBoard_setEnetControl(ethPort->enetType, ethPort->macPort, &ethPort->mii);

}
return ENET_SOK;
}

static void EnetBoard_setEnetControl(Enet_Type enetType,
Enet_MacPort macPort,
EnetMacPort_Interface *mii)
{
int32_t status = ENET_SOK;

if (!EnetMacPort_isRmii(mii) && !EnetMacPort_isRgmii(mii) && !EnetMacPort_isMii(mii))
{
//LOG_ERR("Invalid MII type: layer %u suyblayer %u\n", mii->layerType, mii->sublayerType);
EnetAppUtils_assert(false);
}

switch (enetType)
{
case ENET_CPSW_3G:
break;

case ENET_ICSSG_DUALMAC:
case ENET_ICSSG_SWITCH:
break;

default:
break;
}

EnetAppUtils_assert(status == ENET_SOK);
}

void EnetBoard_getMacAddrList(uint8_t macAddr[][ENET_MAC_ADDR_LEN],
uint32_t maxMacEntries,
uint32_t *pAvailMacEntries)
{
uint8_t macAddrBuf[][ENET_MAC_ADDR_LEN] =
{
{ 0x70U, 0xFFU, 0x76U, 0x1DU, 0x92U, 0xC1U },
{ 0x70U, 0xFFU, 0x76U, 0x1DU, 0x92U, 0xC2U },
{ 0x70U, 0xFFU, 0x76U, 0x1DU, 0x92U, 0xC3U },
{ 0x70U, 0xFFU, 0x76U, 0x1DU, 0x92U, 0xC4U },
};
uint32_t macAddrCnt = ENET_ARRAYSIZE(macAddrBuf);

/* Save only those required to meet the max number of MAC entries */
*pAvailMacEntries = EnetUtils_min(macAddrCnt, maxMacEntries);
memcpy(&macAddr[0U][0U], &macAddrBuf[0U][0U], *pAvailMacEntries * ENET_MAC_ADDR_LEN);
}

uint32_t EnetBoard_getId(void)
{
return ENETBOARD_AM64X_AM243X_EVM;
}

void EnetBoard_getMiiConfig(EnetMacPort_Interface *mii)
{
mii->layerType = ENET_MAC_LAYER_GMII;
mii->sublayerType = ENET_MAC_SUBLAYER_REDUCED;
mii->variantType = ENET_MAC_VARIANT_FORCED;
}

The properties information is as follows:

Pre-define:

${SYSCONFIG_TOOL_SYMBOLS}

${COM_TI_INDUSTRIAL_COMMUNICATIONS_SDK_AM243X_SYMBOLS}

SOC_AM243X ENET_ENABLE_PER_ICSSG=1

_DEBUG_=1

include path:

${SYSCONFIG_TOOL_INCLUDE_PATH}

${COM_TI_INDUSTRIAL_COMMUNICATIONS_SDK_AM243X_INCLUDE_PATH}

${CG_TOOL_ROOT}/include/c ${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/source

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/FreeRTOS-Kernel/include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/portable/TI_ARM_CLANG/ARM_CR5F

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/config/am243x/r5f

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/lwip/lwip-stack/src/include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/lwip/lwip-port/include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/lwip/lwip-port/freertos/include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/core/utils

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/core/utils/include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/core/utils/V3

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/core

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/core/include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/core/include/phy

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/core/include/core

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/soc/k3/am64x_am243x

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/hw_include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/hw_include/mdio/V4

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/board/ethphy/enet/rtos_drivers/include

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/board/ethphy/port

include library file :

${SYSCONFIG_TOOL_LIBRARIES}

${COM_TI_INDUSTRIAL_COMMUNICATIONS_SDK_AM243X_LIBRARIES}

freertos.am243x.r5f.ti-arm-clang.release.lib

drivers.am243x.r5f.ti-arm-clang.release.lib

enet-icssg.am243x.r5f.ti-arm-clang.release.lib

board.am243x.r5f.ti-arm-clang.release.lib

libc.a

libsysbm.a

include  library path :

${SYSCONFIG_TOOL_LIBRARY_PATH}

${COM_TI_INDUSTRIAL_COMMUNICATIONS_SDK_AM243X_LIBRARY_PATH}

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/kernel/freertos/lib

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/drivers/lib

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/board/lib

${INDUSTRIAL_COMMUNICATIONS_SDK_PATH}/mcu_plus_sdk/source/networking/enet/lib

${CG_TOOL_ROOT}/lib

${PROJECT_BUILD_DIR}/syscfg

Configuration is Release Active

Hi Kim,

Please let me try to reproduce the issue on our setup to understand the issue. It will be more helpful if you share the application logs in debug mode rather than in release mode. Please expect a reply in 1 week due to ongoing commitments.

Thanks and regards,
Teja.

Hi Teja,

Additionally, the SBL I'm using uses mcu_plus_sdk_am243x_08_05_00_24.

Could this be the issue?

Hi Kim,

This could be an issue, but we can't confirm yet without understanding the cause of failure. Can you please share the debug logs of the example? That will help us understand more details about the failure.

Thanks and regards,
Teja.

Hi Kim,

Thank you for the response. I am marking this thread as closed. Please create an E2E if you need any further support

Thanks and regards,
Teja.