AM2434: am243x-lp

Hi,

Baruch Einziger said:

• What could cause this kind of UART data corruption on the AM243X-LP?

• Could adding an additional wait state to the FIFO read access help mitigate the problem?

Have you tested out for Interrupt, Polling and DMA as well?

I am also considering you are on the latest SDK while you are testing this out.

Thanks,

Vaibhav

hi Vaibhavi

i am working with pooling for all uarts. i have 150us timer interrupt. and i read and write fifo after fifo.

during the interrupt service routine i disable all interrupt. the timing is good and i still as receive error.

thanks baruch

Hi Vaibhav 

i am working with pooling mode only. i have 150us interrupt hand i handle the uarts receive and transmite fifo by the interrupt handler. 

about the SDL i am starting with mcu_plus_sdk_am243x_10_01_00_32

thanks

baruch

Greetings Baruch,

Baruch Einziger said:

about the SDL i am starting with mcu_plus_sdk_am243x_10_01_00_32

I do not see any driver difference between this SDK and the current latest SDK, so the possibility of any bug fix is ruled out in this scenario.

Also, I understand your flow is to simply read from the RS485.

Can you make sure the baud rate of RS485 is <+- 1.5% of the UART's baudrate?

Also, the UART Write operation is ruled out, hence lets focus on the UART read call.

Can you set the rx trigger level in the SysConfig GUI to a lower value like 1 or 8 and test this out?

Can you share the MPU ARMv7 configurations as well?

Looking forward to your response.

Thanks,

Vaibhav

Dear Vaibhav,

My working method is to interface directly with the UART registers. Every 150 µs, I read the contents of each UART FIFO and handle both the TX and RX FIFOs for each UART. As mentioned earlier, the error occurs in the external loop.

The programming process starts with SysConfig, which I have reviewed and found to be correct. However, regarding the baud rate of 230,400 bps — I cannot adjust it while maintaining an acceptable tolerance. This is because we generate the baud rate clock with a factor of 16, and any change results in a baud rate error. With a 48 MHz UART clock, the error exceeds 7%, which is too high. Even with a 192 MHz UART clock, the error remains around 2%.

I have not found any clear reason for these issues. The program is not functioning correctly, and I am unsure what else to try. no timing problems and no error messages

I can send you an example so you can reproduce the error and review it alongside my code.

Thank you,
Baruch

Dear Vaibhav,

During my last attempt to debug the issue, I changed the baud rate from 3,000,000 to 115,200. At that point, I noticed a single error at the last character. Using the oscilloscope, I observed that the expected character was 0x9F, but the transmitted character was 0xAF. This indicates the problem is related to a TX error.

In my state machine, I made a modification: I removed the last state and reduced the size of the final sub-message written to the RX FIFO. To my surprise, this resolved the error—though I don’t fully understand why.

The following code works correctly:

However, the following version causes the error:

In both implementations, I save a copy of the message just before writing each byte into the TX FIFO, and no errors appear there.

I don’t yet understand why the first modification resolves the issue.

Thank you,
Baruch