This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MSPM0L1105: SPI0 controller receive interrupt speed

Part Number: MSPM0L1105
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Hello

We are using the MSPM0L1105 as an SPI peripheral and have configured the pinmux using CCS and sysconfig.

Configuration for SPI is as follows:

We have setup the IRQ handler to perform some very basic benchmarking to test response time:

void PER_SPI_INST_IRQHandler(void)
{
    uint32_t count = 0;
    uint16_t buffer[256] = {0}};

    switch (DL_SPI_getPendingInterrupt(PER_SPI_INST)) { 
        case DL_SPI_IIDX_RX_TIMEOUT:
            loopCount++;
            count =  DL_SPI_drainRXFIFO16(PER_SPI_INST, buffer, 256);
            DL_SPI_transmitDataBlocking16(PER_SPI_INST, loopCount);
            break;

        case DL_SPI_IIDX_RX:
            loopCount++;
            count =  DL_SPI_drainRXFIFO16(PER_SPI_INST, buffer, 256);
            gADCResult = convertAnalogInput(0);
            gADCResult &= 0x0FFF;
            DL_SPI_transmitDataBlocking16(PER_SPI_INST, loopCount);
            break;
        default:
            break;
    }
}

Data being sent is 16bit length per message and a total of 3 messages to represent a real-world messaging for a SPI ADC peripheral.

Command, dummy cycle, response:

There is no issue with receiving all the data and clock cycles:

The issue is I need the RX interrupt to occur between the first and second message to allow me to populate the transmit buffer to respond to the master.

I have tried to set the RX timeout to 125ns in the hope that it would trigger the IRQ in the chip select transition stage (we essentially have 12.5us).

Is there a way to make the SPI IRQ faster so I get notiified when the controller has received 1 message?

Thanks for any assistance.

  • On the face of it I would expect (a) with the Rx FIFO threshold=1 the interrupt should trigger after each received datum and (b) with a 32MHz CPU clock this code should easily run in 12.5 usec (unless convertAnalogInput() is inordinately expensive), so seeing count=3 is a bit of a surprise.

    I will point out:

    >  uint16_t buffer[256] = {0}};

    1) This variable has to be 0-initialized on every call. One supposes it wouldn't add up to 3200 CPU clocks, but it may still be muddying your results.

    2) At 512 bytes, this one variable is twice the size of the default stack (256B), so you're certainly overflowing the stack (on every call). 

    I suggest you move this variable out of the ISR function (global), or at least make it "static".

    You might consider setting aside a GPIO which you raise/lower on each ISR call, so you see where (in the transaction) it's actually being called.