AM2632: Missing registers in CPSW section

Part Number: AM2632

Tool/software:

Hi,

I have AM263x launchpad. I am using AM263x Sitara Processors Technical Reference Manual Register Addendum (Rev. E)

I was going through the enet (MAC) loopback example in mcu_plus_sdk_am263x_09_02_00_56 SDK for debugging the receive issue in my bare metal CPSW driver.

I noticed that port control register exists for Port 0 in AM263x Register Addendum (Rev E), but the port control register for Port 1 and Port 2 is missing.

Please share the information of the port control register for Port 1 and Port 2 of CPSW. Also, if there are any other missing registers in AM263x Register Addendum (Rev E) then please share information on them as well.

Thank you,

Shitanshu Desai

  • Hi Shitanshu,

    Can you tell me the name of the register and the address of the register.

    Regards,

    Aswin

  • Hi Aswin,

    CPSW Port 0 control register:

    -> Address: 5283 E040h

    -> Name: CPSW_NC_ALE_I0_PORTCTL0


    CPSW Port 1 and Port 2 control register information is missing. This register is required to configure the port state.

    Thank you,

    Shitanshu Desai

  • Hi Shitanshu,

    Let me check this register configuration

    Regards,

    Aswin

  • Hi Shitanshu,

    CPSW_NC_ALE_I0_PORTCTL0 is a single instance register. In TRM if the register name ends with _J then multiple instances of those registers would be there.

    If you can tell me which feature you are trying to configure then I can check the corresponding register or SW API's for the same.

    Regards,

    Aswin

  • AM2632 Register addendum documentation has a lot of typo errors so, I am not agreeing to "_J" justification.

    I am telling you the behavior of how the hardware is executing the CPSW driver. I executed MAC loopback example from mcu_plus_sdk_am263x_09_02_00_56 SDK (software-dl.ti.com/.../EXAMPLES_ENET_CPSW_LOOPBACK.html).

    The loopback example is configuring a register at 0x5283E044 address, but the register does not exist in AM263x Register Addendum (Rev E). If 0x5283E044 address is not configured to set the Port 1 in forwarding state, then the MAC loopback does not work and I am not able to read the data back. The following addresses are having port control register for Port 1 and Port 2.


    -> CPSW ALE Port 1 control register address: 0x5283E044
    -> CPSW ALE Port 2 control register address: 0x5283E048

    I want the information about the registers at above mentioned address locations. I am developing a bare metal code, so I can not use the freertos examples  as is from the SDK.

  • Hi Shitanshu,

    Apologies for the delay in my response. You are correct. The register is a per port register and the address is not mentioned in the Register addendum.
    I have reached out to the concerned experts for this issue. Please allow me some time to get back

    Regards,

    Aswin

  • Hi Shitanshu,

    This is a bug in the RA generation. I have filed a bug for this.

    Please find the link below.

    https://jira.itg.ti.com/browse/SMCUAPPS-1118

    I reached out to the expert related to this and please see their response

    I want the information about the registers at above mentioned address locations. I am developing a bare metal code, so I can not use the freertos examples  as is from the SDK.

    It would be exactly the same as the port 0 control register

    This register should be a Register Array, where the register should be ALE_PORTCTLx with address offset of 40h + j, where x = [0:2] for ports 0-2, and j is the offset of (4h * x)

    Regards,

    Aswin