Other Parts Discussed in Thread: SYSCONFIG
Tool/software:
To whom it may concern.
I am currently testing the trigger warm reset mode from the WDT. As my watchdog responded nicely to the phase where you would pet it several occasions in a specific period, I tried to test it by just leaving the program running without petting the watchdog, with the anticipation that the board would trigger a warm reset and exit the debugger. However, it does not escape the program and i noticed that my SysConfig would have this by default.
.debugStallMode = Watchdog_DEBUG_STALL_ON,
How do I change that in SysConfig and would i be able to have the watchdog making the board reset with this code
void CWDT::runWarmResetDemo(uint32_t phase1_ms, uint32_t pet_period_ms, bool manageDrivers)
{
if (manageDrivers)
{
Drivers_open();
Board_driversOpen();
}
logAndClearResetCause();
DebugP_assert(gWatchdogHandle[CONFIG_WDT0] != NULL);
DebugP_log("==== WDT Warm-Reset Demo ====\r\n");
DebugP_log("Phase 1: Petting for %u ms every %u ms...\r\n", phase1_ms, pet_period_ms);
uint64_t t0 = ClockP_getTimeUsec();
while ((ClockP_getTimeUsec() - t0) < (static_cast<uint64_t>(phase1_ms) * 1000ULL))
{
Watchdog_clear(gWatchdogHandle[CONFIG_WDT0]);
ClockP_usleep(static_cast<uint32_t>(pet_period_ms) * 1000U);
}
DebugP_log("Phase 2: STOP servicing; expecting warm reset after ~timeout...\r\n");
/* Now just idle and let the WDT expire; the board will reset, so this never returns */
while (1)
{
ClockP_usleep(2500000U); // 2500 ms
}
/* No close() here; we never reach it before reset */
}
/* Read, print, and clear warm-reset cause bits for MCU and MAIN domains. */
void CWDT::logAndClearResetCause()
{
uint32_t mcu = SOC_getWarmResetCauseMcuDomain();
uint32_t main = SOC_getWarmResetCauseMainDomain();
DebugP_log("Reset cause MCU: 0x%08x\r\n", mcu);
DebugP_log("Reset cause MAIN: 0x%08x\r\n", main);
/* Clear latched bits so next boot shows fresh causes */
SOC_clearResetCauseMainMcuDomain(mcu | main);
}
