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TMS570LC4357-SEP: Running the Controller Above Max Clock

Part Number: TMS570LC4357-SEP
Other Parts Discussed in Thread: HALCOGEN

Tool/software:

I'm trying to achieve 5 Mbps UART on the TMS570LC43x LaunchPad, which requires setting the SCI baud rate clock close to 8 MHz. To do this, I’ve configured the MCU to run above the max clock limits specified in the datasheet using HALCoGen.

  1. What issues can arise from exceeding the rated clock speeds?
  2. What can I do to achieve this data rate by staying within the max. clock?

I've attached my HALCoGen config and test code in a ZIP file for reference.

I am also facing below errors when I try to upload a new program:

  • CortexR5: GEL Output: Memory Map Setup for Flash @ Address 0x0CortexR5: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map.
  • CortexR5: File Loader: Verification failed: Values at address 0x00000003 do not match Please verify target memory and memory map.
  • CortexR5: GEL: File: a data verification error occurred, file load failed.

I can upload a new program by holding the RESET button and releasing it right after clicking the debug button in CCS, but this works only sometimes. I need to try almost 30-40 times and randomly one time I am able to flash the new program. Kindly advise on this also.

4572.UART.zip

  • Hi Dhir,

    Apologies for the delayed response.

    Based on the technical documents provided, here is an analysis of your questions regarding clock speeds and flash programming errors on the TMS570LC43x device.

    Summary of Issues

    Operating the device beyond the specified maximum clock speeds is not recommended and can lead to unpredictable behavior and system failure. The standard SCI (UART) module on the TMS570LC43x has a maximum achievable baud rate of 3.125 Mbits/s when using a 100 MHz peripheral clock, making your 5 Mbps goal unattainable with this module under specified conditions. Higher data rates may be achieved by using other peripherals like the MibSPI or FlexRay.

    The flash programming errors you are experiencing are characteristic of issues with the flash memory's Error Correcting Code (ECC). When the flash memory contains data with invalid ECC, the debugger can be prevented from writing to or verifying the memory, resulting in the errors you have described.


    Clock Speeds and High Data Rate UART

    Issues with Exceeding Rated Clock Speeds

    The datasheets for the TMS570LC43x family specify maximum operating frequencies for the CPU and peripherals to ensure reliable operation. For instance, the TMS570LC43x CPU is specified to run up to 300 MHz or 330 MHz depending on the specific device variant. Operating the microcontroller outside of these specified limits can result in timing violations, unpredictable program execution, and potential damage to the device. The device's behavior is not guaranteed when operated outside the datasheet's electrical characteristics.

    Achieving 5 Mbps Data Rate

    The technical documents indicate that the standard SCI module cannot achieve a 5 Mbps data rate while operating within the specified peripheral clock limits.

    • SCI Module Limitation: The SCI/LIN module features list explicitly states, "At 100-MHz peripheral clock, 3.125 Mbits/s is the Max Baud Rate achievable". This is the maximum specified capability for the standard UART communication.

    To achieve higher serial data rates, you can consider using other on-chip peripherals:

    • SPI as UART: The application report "Using the SPI as an Extra UART Transmitter" demonstrates how a MibSPI peripheral can be re-purposed to function as a UART transmitter. The MibSPI is designed for high-speed communications and may be capable of reaching the desired data rates with minimal software overhead.
    • FlexRay Controller: The TMS570LC43x includes a FlexRay controller that supports communication rates of 10 Mbps per channel. While not a standard UART, it is a high-speed serial communication option available on the device.

    Flash Programming Errors

    The errors Memory region that is not writable and Verification failed during programming are strong indicators of an ECC-related issue within the flash memory.

    ECC Protection in Flash Memory

    The TMS570LC43x microcontroller's flash memory is protected by a Single Error Correction Double Error Detection (SECDED) ECC logic. This feature enhances reliability by correcting single-bit errors and detecting multi-bit errors during memory access.

    • ECC Calculation: The 8-bit ECC is calculated based on a 64-bit data word and, importantly, also includes 19 bits of the memory address. This means the same data stored at different addresses will have different ECC values.
    • Cause of Errors: When flash memory is erased, all bits (both data and ECC) are set to '1'. However, a block of all '1's for data and ECC is generally not a valid combination for most addresses. When the debugger or bootloader attempts to read an erased location before writing to it, the CPU's ECC logic detects an uncorrectable error because the stored ECC bits (0xFF) do not match the calculated ECC for that address. This causes the CPU to signal an error, which the debugger interprets as the memory being non-writable or failing verification. This can happen due to a previously failed programming attempt or an incomplete erase cycle.

    The workaround of pressing the RESET button likely succeeds intermittently by altering the timing of the debug connection, sometimes allowing the debugger to issue a mass erase command before the ECC logic can halt the operation.

    The fundamental solution is to perform a full erase of the flash memory. This will reset the entire flash bank, including all ECC data, to a clean state. Once the flash is fully erased, the debugger should be able to program the new application without encountering ECC errors.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    Thank you for your prompt response. I appreciate the detailed explanation. However, I do have some concerns that the content may have been generated by AI, and I want to ensure the accuracy of the information provided.

    Could you please confirm whether the explanation is verified and aligns with the device's technical specifications?


  • Hi Dhir Gandhi,

    Thank you for your prompt response. I appreciate the detailed explanation. However, I do have some concerns that the content may have been generated by AI, and I want to ensure the accuracy of the information provided.

    Could you please confirm whether the explanation is verified and aligns with the device's technical specifications?

    You are correct this is generated by our internal tool however i verified its response before providing to you. And it is correct and accurate.

    --
    Thanks & regards,
    Jagadish.

  • Thanks for confirming Jagadish.