TMS570LC4357-SEP: Programming TMS570LC4357-SEP with LP-XDS110

Part Number: TMS570LC4357-SEP
Other Parts Discussed in Thread: LP-XDS110

Tool/software:

I am working with a custom board that uses the TMS570LC4357-SEP controller, and I plan to program it using the LP-XDS110 kit. My custom board will have seperate power, so I don't need to supply it with the LP-XDS110 kit. I have two questions:

  1. Firmware on LP-XDS110

    • Do I need to upload any firmware to the LP-XDS110 before I can use it to program my custom board?

    • If yes, what firmware is required, and how do I upload it?

  2. Interfacing nTRST

    • My custom board has the following connections (JTAG signals).

    • From what I understand, the LP-XDS110 does not provide an nTRST output. How should I interface the LP-XDS110 with my custom board? I do not want to keep nTRST pulled HIGH by default on my card.

                   

  • Hi Dhir,

    • Do I need to upload any firmware to the LP-XDS110 before I can use it to program my custom board?

    • If yes, what firmware is required, and how do I upload it?

    The LP-XDS110 should already come with the default firmware, so you can directly start using it with your board.

    If there is any new firmware available for it then CCS will give you a prompt to update after connecting it.

    • My custom board has the following connections (JTAG signals).

    • From what I understand, the LP-XDS110 does not provide an nTRST output. How should I interface the LP-XDS110 with my custom board? I do not want to keep nTRST pulled HIGH by default on my card.

    The standard 14-pin TI JTAG header, which is used by TI emulators, includes an nTRST output signal. This signal should be connected directly to the nTRST input pin of the TMS570LC4357-SEP microcontroller. The target device has an internal pulldown resistor on its nTRST pin, which satisfies the JTAG interface requirements without needing an external pull-up resistor.

    JTAG Header and Target Device Pin Details

    The standard TI debug interface uses a 14-pin header that includes the nTRST signal. The TMS570LC4357-SEP device includes a dedicated nTRST pin with an internal pulldown.

    Table 1: 14-Pin JTAG Header

    Name Pin Pin Name
    TMS 1 2 nTRST
    TDI 3 4 GND
    PD (Vdd) 5 6 No pin (key)
    TDO 7 8 GND
    RTCK 9 10 GND
    TCK 11 12 GND
    EMU0 13 14 EMU1

    Table 2: TMS570LC4357-SEP nTRST Pin Characteristics

    Signal Name Terminal (337 GWT) Signal Type Default Pull State Pull Type Description
    nTRST D18 Input Pulldown 100 μA JTAG test hardware reset

    Interface Requirements

    For standard TI debug products to work correctly, the system-level port must meet specific criteria. One of these requirements is "A logic zero (by a passive or active pulldown) applied to the nTRST header signal".

    The internal 100 µA pulldown on the TMS570LC4357-SEP's nTRST pin (D18) fulfills this requirement. Therefore, you should connect the nTRST pin from the JTAG header directly to the nTRST pin on your custom board. This configuration correctly handles the reset state for the JTAG logic and aligns with your preference to not have nTRST pulled high by default. When asserted (driven low) by the emulator, the nTRST signal resets the test and debug logic on the device.

    --
    Thanks & regards,
    Jagadish.

  • Hello Jagadish,
    Thanks for the clarification. I am still not clear with the nTRST pin on the XDS-110 launchpad. I understand that nTRST has to be pulled down when not in use, and driven to logic High when JTAG is to be used. Below is the photo from XDS-110's schematic. Do let me know which pin do I need to interface with nTRST of the controller.