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MSPM0G1107: I2c bypass mode from 1 i2c module to the other i2c module

Frank(EP) Liu
Expert 5000 points
Part Number: MSPM0G1107


Tool/software:

Hi Expert,

My customer uses first i2c as target connecting with their host ic and the 2nd i2c as controller to others devices.

Because the devices has the same i2c address. So, they need to connect same i2c address devices in different 2nd i2c pins.

For i2c features, MSPM0 acts as mux and switch i2c pins by pins. host doesn't need to change any code for this.

So, can MSPM0 bypass i2c target module to i2c Control module directly?

Can DMA do similar stuff? example code for this?

BR,

frank

 

  • 0
    Guru 100705 points

    I'm not quite sure what the architecture is here:

    1) Both I2C units (separate pins) on a single bus, with one as controller and the other target?

    2) Each I2C unit (separate pins) on a separate bus?

    3) Same as (1) but on the same pins (swapping back and forth)?

    4) One I2C unit that switches (on the fly) between controller and target?

    I use (1) with some patch wires to exercise my target device code. I haven't had occasion to try (2) but it seems straightforward. Option (3) sounds like a headache with switching the Pin Function setting on the fly. Option (4) is fine and even has an Example (here).

    As far as I know the I2C unit will not switch between target and controller on its own -- you have to (re-)configure it.

    A controller device doesn't really have an "Own" address, so there's no conflict there.

    [Edit: As far as I know there's no "backchannel" mechanism to route an incoming transaction on one I2C unit as an (outgoing) transaction on the other. I expect it's possible to write MCR (to start the outgoing transaction) using DMA, along with a second channel to move the data, but you still e.g. need to set the target address and adjust lengths.]

  • 0 in reply to Bruce McKenney
    TI__Expert 5000 points

    Bruce,

    the architecture is like mux. From below, slaves A1...An has the same i2c address with B1...Bn, C1...Cn, ...., H1..Hn.

    so, not need to switch controller and target.

    also, switch devices is not the issue. host ic can control the timing to switch for different devices(A\B\C...).

    Any example to do below?

    Bruce McKenney said:
    I expect it's possible to write MCR (to start the outgoing transaction) using DMA, along with a second channel to move the data, but you still e.g. need to set the target address and adjust lengths.]

    BR,

    frank

  • +1 in reply to Frank(EP) Liu
    Guru 100705 points

    I haven't seen an example which uses DMA to trigger an I2C transaction ( I don't really expect to since it's an unusual application).

    I did once write something for the MSP430 which amounted to a signal generator for an I2C DAC. It used a timer-triggered DMA to write the Start request, (equivalent to writing the MCR) and let the I2C unit drive a (separate) data DMA channel. But that was a very restricted case, with a constant well-known transaction profile (address/length/direction); I don't see how that model would scale without some CPU (software) intervention.

    The model you're suggesting (PCF9548A analogue) seems to imply switching the pins used by a (single) I2C unit i.e. switching the PFs in the IOMUXes. You should probably try this before designing it in -- a typical I2C unit (not just MSPM0) has a bus monitor which may take exception to switching the pins on the fly.