Tool/software:
Hi,
The datasheet describes the Acquisition time of ADC from 2 to 257.
What's the default value ?
How can they confirm it ?
Thanks and regards,
Hideaki
Hi Hideaki,
The sample delay defaults to a value of zero which causes the acquisition time to be equal to 2 SMPL_CLK cycles. Please note, sample delay value is configurable in order to be able to fill up the sampling capacitor based on the application.
To confirm the value, read the value of the relevant register found in the AM243x TRM, Section 12.1.1.6.16, ADC_STEPDELAY_j Register.
Please let me know if that helps!
Best regards,
Karam