AM263P4: For ENET examples, do the buffers in .bss:ENET_DMA_PKT_MEMPOOL need to be uncached?

Hi Huey Duong,

We only mark the CPPI descriptor memory location as non-cached. The ENET_DMA_PKT_MEMPOOL buffers placed in OCRAM are cached and we handle the cache coherency operations (Writeback and invalidate) in the enet driver (enet_cpdma.c) via EnetOsal_cacheInv and  EnetOsal_cacheWbInv APIs.

As per my discussion with the networking team, having the ENET_DMA_PKT_MEMPOOL marked as non-cached affects the enet throughput. I'd recommend having the configuration as shown in the default out-of-box examples. Rather than negatively affecting performance, this approach actually improves overall system performance when properly managed:

1. For TX (transmit) operations:

• Before sending a packet, the driver calls EnetOsal_cacheWbInv() to write any modified data in cache back to main memory and invalidate the cache line
• This ensures the DMA controller reads the correct, updated data from memory

2. For RX (receive) operations:

• Before providing a buffer to the DMA controller, the driver calls EnetOsal_cacheInv() to invalidate any cached data.
• When the CPU later accesses the received data, it will fetch from main memory rather than using potentially stale cached data

Using non-cached memory for buffers would avoid the need for explicit cache management but would significantly slow down CPU access to the packet data, which is typically more performance-critical than the overhead of cache management operations. The CPPI_DESC region is kept non-cached because these descriptors are frequently accessed by the DMA controller but infrequently accessed by the CPU, so the cache benefits would be minimal compared to the coherency management overhead.

Regards,
Shaunak