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TMDSCNCD263P: What is does Opcode field represents in different registers

Part Number: TMDSCNCD263P

Tool/software:

Hi Team,

Greetings of the day.

I have noticed that the registers DEV_INSTR_RD_CONFIG_REG, DEV_INSTR_WR_CONFIG_REG, and FLASH_CMD_CTRL_REG all contain a field called "Opcode". Could you please explain what this Opcode represents in each of these three registers and when to use each one?

Additionally, in the TRM section 13.3.2.2.5.4.11, it is mentioned that:

"OSPI_FLASH_CMD_CTRL_REG[31-24] CMD_OPCODE_FLD bits should be set different than OSPI_DEV_INSTR_RD_CONFIG_REG[7-0] RD_OPCODE_NON_XIP_FLD and OSPI_DEV_INSTR_WR_CONFIG_REG[7-0] WR_OPCODE_FLD."

Could you please explain what this means?

If I want to read the Flash device ID, issue chip erase cmd or read/write data to/from the Flash device, what are the appropriate commands I need to use, and in which register should I configure the opcode fields?

Thanks in advance.

  • Hi,
    The OPCode represents the command for the specific function being used. DEV_INSTR_RD_CONFIG_REG stores the info for read operations, while the WR_CONIG_REG saves the write Opcode. these are used to generate commands for rd/wr operations.

    Regards,
    shivank