MSPM0L1305: Arm-based microcontrollers forum

Part Number: MSPM0L1305
Other Parts Discussed in Thread: SYSCONFIG, MSPM0L1306, UNIFLASH

Tool/software:

Hello,

My MSPM0L1306 application is greater than 4K and is located at 0x0000. If I try to load this image with the secondary BSL it overwrites the FLASH area where the secondary BSL resides. I tried relocating the secondary BSL to 0x4000 as described in SLAAE88D MSPM0 Bootloader Implementation Section 5.3.1 including the changing Sysconfig setting for the Alternate BSL address to 0x4041, but does not work. Is there anything else I need to do??

Thanks,

Frank

  • Hi Frank,

    Could you share what your linker (cmd) file looks like?

    I would suggest referencing the secondary_bsl_uart example in the SDK as well (this is for an MSPM0L1306):

    /*
     * Copyright (c) 2024, Texas Instruments Incorporated
     * All rights reserved.
     *
     * Redistribution and use in source and binary forms, with or without
     * modification, are permitted provided that the following conditions
     * are met:
     *
     * *  Redistributions of source code must retain the above copyright
     *    notice, this list of conditions and the following disclaimer.
     *
     * *  Redistributions in binary form must reproduce the above copyright
     *    notice, this list of conditions and the following disclaimer in the
     *    documentation and/or other materials provided with the distribution.
     *
     * *  Neither the name of Texas Instruments Incorporated nor the names of
     *    its contributors may be used to endorse or promote products derived
     *    from this software without specific prior written permission.
     *
     * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
     * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
     * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
     * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
     * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
     * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     */
    
    -uinterruptVectors
    
    /*----------------------------------------------------------------------------*/
    /* Memory Map                                                                 */
    
    MEMORY
    {
    	FLASH_SBSL_INTVEC(RWX)  :	 org = 0x00001000,      len = 0x00000040,
    	FLASH_SBSL_START(RWX)   :	 org = 0x00001040,      len = 0x00000040,
    	FLASH_SBSL(RWX)   		:	 org = 0x00001080,      len = 0x00001F80,
    
        SRAM(RW)				:    org = 0x20000000,      len = 0x00001000,
    
        BCR_CFG		 		    : 	 org = 0x41C00000,      len = 0x00000080,
        BSL_CFG				    : 	 org = 0x41C00100,      len = 0x00000080,
        FACTORY_CFG		  		: 	 org = 0x41C40000,      len = 0x00000200,
    }
    
    /*----------------------------------------------------------------------------*/
    /* Section Configuration                                                      */
    
    SECTIONS
    {
    	.intvecs			: PALIGN(8) {} > FLASH_SBSL_INTVEC
    	.sblStart			: PALIGN(8) {} > FLASH_SBSL_START
    
        GROUP(FLASH_MEMORY) {
            .text          	: PALIGN(8) {}
            .const         	: PALIGN(8) {}
            .cinit         	: PALIGN(8) {}
            .rodata			: PALIGN(8) {}
        } > FLASH_SBSL
    
        GROUP(SRAM) {
        	.vtable 		: {}
            .data          	: {}
            .bss           	: {}
       } > SRAM
    
    	.TI.ramfunc   : load = FLASH_SBSL, palign(8), run=SRAM, table(BINIT)
    
        .stack  :   > SRAM (HIGH) SIZE(BSL_CI_stackSize)
    
        .factoryConfig          : {} > FACTORY_CFG
        .BCRConfig              : {} > BCR_CFG
        .BSLConfig              : {} > BSL_CFG
    }
    

    If you are using SysConfig, ensure you have disabled the generation of the linker file. Otherwise, each time you build your project, it will rewrite the file.

    Best,

    Owen

  • Hi Owen, 

    Right. Link file generation is disabled by default in Syscongi with that example project. Below is my modification to mspm0l1306.cmd, which I copied from MSPM0 Bootloader Implementation Section 5.3.1 .

    Frank

    /*
    * Copyright (c) 2024, Texas Instruments Incorporated
    * All rights reserved.
    *
    * Redistribution and use in source and binary forms, with or without
    * modification, are permitted provided that the following conditions
    * are met:
    *
    * * Redistributions of source code must retain the above copyright
    * notice, this list of conditions and the following disclaimer.
    *
    * * Redistributions in binary form must reproduce the above copyright
    * notice, this list of conditions and the following disclaimer in the
    * documentation and/or other materials provided with the distribution.
    *
    * * Neither the name of Texas Instruments Incorporated nor the names of
    * its contributors may be used to endorse or promote products derived
    * from this software without specific prior written permission.
    *
    * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
    * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
    * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
    * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
    * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
    * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
    * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
    * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
    * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
    * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
    */

    -uinterruptVectors

    /*----------------------------------------------------------------------------*/
    /* Memory Map */

    MEMORY
    {
    FLASH_SBSL_INTVEC(RWX) : org = 0x00004000, len = 0x00000040,
    FLASH_SBSL_START(RWX) : org = 0x00004040, len = 0x00000040,
    FLASH_SBSL(RWX) : org = 0x00004080, len = 0x00001F80,

    SRAM(RW) : org = 0x20000000, len = 0x00001000,

    BCR_CFG : org = 0x41C00000, len = 0x00000080,
    BSL_CFG : org = 0x41C00100, len = 0x00000080,
    FACTORY_CFG : org = 0x41C40000, len = 0x00000200,
    }

    /*----------------------------------------------------------------------------*/
    /* Section Configuration */

    SECTIONS
    {
    .intvecs : PALIGN(8) {} > FLASH_SBSL_INTVEC
    .sblStart : PALIGN(8) {} > FLASH_SBSL_START

    GROUP(FLASH_MEMORY) {
    .text : PALIGN(8) {}
    .const : PALIGN(8) {}
    .cinit : PALIGN(8) {}
    .rodata : PALIGN(8) {}
    } > FLASH_SBSL

    GROUP(SRAM) {
    .vtable : {}
    .data : {}
    .bss : {}
    } > SRAM

    .TI.ramfunc : load = FLASH_SBSL, palign(8), run=SRAM, table(BINIT)

    .stack : > SRAM (HIGH) SIZE(BSL_CI_stackSize)

    .factoryConfig : {} > FACTORY_CFG
    .BCRConfig : {} > BCR_CFG
    .BSLConfig : {} > BSL_CFG
    }
  • Hi Frank,

    Your linker file looks good. When you say it doesn't work, you mean that the secondary BSL still starts at 0x1080?

    Have you tried rebuilding the entire project? Project > Rebuild Project?

    Is there anyway you can share your entire project?

    Best,

    Owen

  • Hi Frank,

    I would also like to add that it is necessary to perform a POR upon changing NONMAIN. Any changes to NONMAIN will not take into affect until this is done.

    I was just able to adapt the SDK example to move my BSL to start at 0x4000.

    Best,

    Owen

  • Hi Owen,

    Yes, I always do a Rebuild Project. When I try to load a image with the secondary BSL > 1K I get the following error message from Uniflash (works when < 1K). I have attached a zip of my secondary BSL project and gpio project. For the gpio project I added some code to make the image size larger than 1K (const uint8_t dummy_data[4024] = {0};) in gpio_toggle_output.c. I am sure I did something wrong but can't figure it out.

    Thanks,

    Frank

    [10/3/2025, 8:16:00 AM] [INFO] CORTEX_M0P: MSPM0L1306(Bootloader)
    [10/3/2025, 8:16:00 AM] [INFO] CORTEX_M0P: Invoking Bootloader....
    [10/3/2025, 8:16:04 AM] [INFO] CORTEX_M0P:
    [10/3/2025, 8:16:04 AM] [INFO] CORTEX_M0P: BSL Connected
    [10/3/2025, 8:16:04 AM] [INFO] CORTEX_M0P: Command Interpreter version: [0x0001] Build ID: [0x0001] Application version: [0x00000000] Active Plugin Interface version: [0x1331] BSL Max buffer size: [0x0704] BSL Buffer Start address: [0x20000180] BCR Config ID: [0x00000x0001] BSL Config ID [0x00000x0001]
    [10/3/2025, 8:16:04 AM] [INFO] CORTEX_M0P: BSL Password is correct!
    [10/3/2025, 8:16:04 AM] [INFO] CORTEX_M0P: Erasing sectors containing DataBlock starting at 0x0 is successful!
    [10/3/2025, 8:16:04 AM] [INFO] CORTEX_M0P: Erasing sectors containing DataBlock starting at 0x6E4 is successful!
    [10/3/2025, 8:16:04 AM] [ERROR] CORTEX_M0P:
    [10/3/2025, 8:16:05 AM] [ERROR] CORTEX_M0P: [ERROR_MESSAGE]Process is failed!

    secondary_bsl_uart_LP_MSPM0L1306_nortos_ticlang.zip5756.gpio_toggle_output_LP_MSPM0L1306_nortos_ticlang.zip

  • Hi Frank,

    Thanks for sharing the projects with me.

    The reason why the process currently fails is because SWP was configured in SysConfig. The Lower Sectors was set to 0xFFFFF00F. This protected the region of flash that contained the secondary BSL when it was located at 0x1000. Since we moved it, we need to move the SWP accordingly. I believe it should now be 0xFF00FFFF. This protects sectors 16-23.

    Now I encounter an issue regarding 8-bit alignment but I don't think it has to do with the application Hex file. I think it may have to do with the BSL, but I'll have to look into this and get back to you Monday.

    Best,

    Owen

  • Thank You!!! I look forward to your findings.

    Regards,

    Frank