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MSPM0G3519-Q1: Comparator to capture to outputs

Part Number: MSPM0G3519-Q1
Other Parts Discussed in Thread: SYSCONFIG

Tool/software:

Dear,

I have problems with the following case:

Picture below:

- pink : entry of comparator on COMP0

- yellow: reference on COMP0

- blue: output of COMP0

- green: signal that is not understood on ccp output.

Configuration: see next code

COMP0 is lead to capture CC2. With the configuraton below, I expect the output to follow the comparator. As you see, this is not happening (green).

- risng edge of comparator ZEROs the counter, falling edge of comparator causes capture.

- zero event will set the CCP2 output, capture event will reset the CCP2 output (blue in picture, but not correct).

COMP0 is also lead to capture CC3. With the configuraiton below, I expect the output to follow the comparator. The output  is simularly not correct as well. 

Same function, but signal on CCP3 output.

void Configure(Void)
{
static const DL_TimerA_ClockConfig gClockConfig =
{
.clockSel = DL_TIMER_CLOCK_BUSCLK,
.divideRatio = DL_TIMER_CLOCK_DIVIDE_1, // Runs half of 40MHz
.prescale = 0
};

DL_TimerA_reset(TIMA0);
DL_TimerA_enablePower(TIMA0);
delay_cycles(POWER_STARTUP_DELAY);

DL_TimerA_setClockConfig(TIMA0, (DL_TimerA_ClockConfig*)&gClockConfig);
DL_TimerA_setCounterMode(TIMA0, DL_TIMER_COUNT_MODE_UP);
DL_TimerA_setCounterValueAfterEnable(TIMA0, DL_TIMER_COUNT_AFTER_EN_ZERO);

//////////////////////////////////////////////////////////////////////////////////////

////////////////////////////////////////////////////////////////////////////////////////////////////////
// FIRST OUTPUT (H1 = PA15)
// Route COMP0 to CCP2 input
DL_TimerA_setCaptureCompareInput(TIMA0, DL_TIMER_CC_INPUT_INV_NOINVERT, DL_TIMER_CC_IN_SEL_COMP0, DL_TIMERA_CAPTURE_COMPARE_2_INDEX);

// Configure CCP2 to:
// - Zero on rising edge (reset timer)
// - Capture on falling edge
DL_TimerA_setCaptureCompareCtl(TIMA0, DL_TIMER_CC_MODE_CAPTURE, DL_TIMER_CC_ZCOND_TRIG_RISE | DL_TIMER_CC_ACOND_TIMCLK | DL_TIMER_CC_CCOND_TRIG_FALL, DL_TIMERA_CAPTURE_COMPARE_2_INDEX);

// Set CCP2 output behavior:
// - High on rising edge (ZERO event)
// - Low on falling edge (CAPTURE event)
DL_TimerA_setCaptureCompareAction(TIMA0, DL_TIMER_CC_ZACT_CCP_HIGH | DL_TIMER_CC_CUACT_CCP_LOW, DL_TIMERA_CAPTURE_COMPARE_2_INDEX);

/////

// SECOND OUTPUT (L2 = PA28)
// Route COMP0 to CCP3 input
DL_TimerA_setCaptureCompareInput(TIMA0, DL_TIMER_CC_INPUT_INV_NOINVERT, DL_TIMER_CC_IN_SEL_COMP0, DL_TIMERA_CAPTURE_COMPARE_3_INDEX);

// Configure CCP3 to:
// - Zero on rising edge (reset timer)
// - Capture on falling edge
DL_TimerA_setCaptureCompareCtl(TIMA0, DL_TIMER_CC_MODE_CAPTURE, /*DL_TIMER_CC_ZCOND_TRIG_RISE | */DL_TIMER_CC_ACOND_TIMCLK | DL_TIMER_CC_CCOND_TRIG_FALL, DL_TIMERA_CAPTURE_COMPARE_3_INDEX);

// Set CCP3 output behavior:
// - High on rising edge (ZERO event)
// - Low on falling edge (CAPTURE event)
DL_TimerA_setCaptureCompareAction(TIMA0, DL_TIMER_CC_ZACT_CCP_HIGH | DL_TIMER_CC_CUACT_CCP_LOW, DL_TIMERA_CAPTURE_COMPARE_3_INDEX);

////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
// The CCP2 and CCP3 lead to output pins

DL_TimerA_setCCPDirection(TIMA0, DL_TIMER_CC2_OUTPUT | DL_TIMER_CC3_OUTPUT);

// Configure counter control to load on CCP2 rising edge

DL_TimerA_setCounterControl(TIMA0, DL_TIMER_CZC_CCCTL2_ZCOND, DL_TIMER_CAC_CCCTL2_ACOND, DL_TIMER_CLC_CCCTL2_LCOND);

// Start TimerA0, TimerA1
DL_TimerA_startCounter(TIMA0);
DL_TimerA_enableClock(TIMA0);

// Configure 4 outputs

DL_GPIO_initPeripheralOutputFunction(GPIO_RXPAD_AR0_C3_IOMUX, GPIO_RXPAD_AR0_C3_IOMUX_FUNC);
DL_GPIO_enableOutput(GPIO_RXPAD_AR0_C3_PORT, GPIO_RXPAD_AR0_C3_PIN);

DL_GPIO_initPeripheralOutputFunction(GPIO_RXPAD_AR0_C2_IOMUX, GPIO_RXPAD_AR0_C2_IOMUX_FUNC);
DL_GPIO_enableOutput(GPIO_RXPAD_AR0_C2_PORT, GPIO_RXPAD_AR0_C2_PIN);
};


/* COMP_0 Initialization */
static const DL_COMP_Config gCOMP_0Config = {
.channelEnable = DL_COMP_ENABLE_CHANNEL_POS_NEG,
.mode = DL_COMP_MODE_FAST,
.negChannel = DL_COMP_IMSEL_CHANNEL_0,
.posChannel = DL_COMP_IPSEL_CHANNEL_2,
.hysteresis = DL_COMP_HYSTERESIS_30,
.polarity = DL_COMP_POLARITY_NON_INV
};
static const DL_COMP_RefVoltageConfig gCOMP_0VRefConfig = {
.mode = DL_COMP_REF_MODE_STATIC,
.source = DL_COMP_REF_SOURCE_NONE,
.terminalSelect = DL_COMP_REF_TERMINAL_SELECT_POS,
.controlSelect = DL_COMP_DAC_CONTROL_COMP_OUT,
.inputSelect = DL_COMP_DAC_INPUT_DACCODE0
};

void InitComp0(void)
{
DL_COMP_reset(COMP0);
DL_COMP_enablePower(COMP0);
delay_cycles(POWER_STARTUP_DELAY);

DL_COMP_init(COMP0, (DL_COMP_Config*)&gCOMP_0Config);
DL_COMP_refVoltageInit(COMP0, (DL_COMP_RefVoltageConfig*)&gCOMP_0VRefConfig);
DL_COMP_enableOutputFilter(COMP0, DL_COMP_FILTER_DELAY_70);

DL_COMP_enable(COMP0);
}

void init(void)
{
InitComp0();
Configure();
DL_GPIO_initPeripheralOutputFunction(GPIO_COMP_0_IOMUX_OUT, GPIO_COMP_0_IOMUX_OUT_FUNC); // show comparator output (blue)
}

Any advice what could be wrong in above code?

Thank you and best regards,

John

  • Hi John,

    Would you be able to provide a drawing of what the intended signals are meant to look like?

    Best Regards,
    Brian

  • Dear Brian,

    Please find the clarifying picture!

    Hope this helps you to advice what could a solution...

    Thank you,

    John

  • DL_TimerA_setCaptureCompareAction(TIMA0, DL_TIMER_CC_ZACT_CCP_HIGH | DL_TIMER_CC_CUACT_CCP_LOW, 

    TRM (SLAU846C) Table 27-78 says that CUACT happens "upon detecting a compare event while counting up". This is different from a (e.g.) CCUn event, which applies to both Capture and Compare, and would seem to be a reasonable extension, but that's not what the words say.

    That said, I can't see what causes CCP2 to (ever) go low. Can you tell whether the Capture is happening?

  • Hi John,

    If you aren't using SysConfig, It is recommended to initialize all used peripherals for the application in the same way that SysConfig does.

    I am consulting with the team expert to further assist.

    Best Regards,
    Brian

  • >DL_TimerA_reset(TIMA0);

    This will reset LOAD=0 and REPEAT=0, so the timer will disable itself after the first cycle. I did observe that (even in this state) the ZCOND seems to have a brief effect (for maybe 6 ticks) before reverting to the OCTL:CCPIV value (=0). In any case your capture values won't be very useful.

    I'm wondering now if there's some other (relevant) code that isn't posted here.

  • Actually with both LOAD=0 and REPEAT=0, the ZCOND seems to generate a pulse which is always about 2ms (before reverting to CCPIV). In particular, by tuning my input (to the COMP0) period to 2ms, I get exactly the CCP2 output (shape) seen in the original trace. I can't quite read the time scale in that trace, but I suspect this is what you're seeing. I don't know where the 2ms comes from.

    By "repairing" REPEAT and LOAD I end up with the all-high that I was expecting on CCP2.

  • Dear Bruce,

    I repaired the timer 'repeat' and 'load' here as well.

    However, it is not clear to me if I should find signals on my CC2 output pin now.

    Purpose:

    I would like to root the COMP0 output through TIMERA0 SW force and through TIMERA0 FAULT unit to arrive on CC2 output.

    Are the ZERO event and CC event not routed to the signal output generator when using TIMERA0 in CAPTURE mode? 

    Is there any work around for this, e.g. using COMPARE mode?

    Thank you so much for you help and efforts!

    Best Regards,

    John

  • CUACT doesn't appear to trigger on a capture. It also doesn't seem to trigger on a compare (with the previous capture value) in capture mode. ZERO does trigger ZACT.

    Do you need the capture value?

    More generally, why not just use COMP_OUT?

  • I have to connect forcing and fault logic behind.... on COMP0 output in some way...

    Also I have 2 sources: COMP0 and PWM... to be forcable and connected to fault logic...

  • I'm pretty sure I saw a way to feed COMP_OUT as a side-channel (as it were) to the Fault logic but I haven't used it and I don't have my materials here. Maybe there's a motor-control wizard out there who can provide a suggestion?

  • If I'm understanding your goal correctly: I don't see anything that says you can't use COMP_OUT for both a capture trigger and a fault trigger.

    I added these lines and I think I got the behavior you're looking for:

    // Replacing the current CompareAction call:
    DL_TimerA_setCaptureCompareAction(TIMA0, 
           DL_TIMER_CC_ZACT_CCP_HIGH | DL_TIMER_FAULT_ENTRY_CCP_LOW|DL_TIMER_FAULT_EXIT_CCP_HIGH, 
           DL_TIMERA_CAPTURE_COMPARE_2_INDEX);
          
    // and down near the bottom:
    DL_Timer_setFaultSourceConfig(TIMA0, DL_TIMER_FAULT_SOURCE_COMP0_SENSE_LOW);
    DL_Timer_setFaultConfig(TIMA0, DL_TIMER_FAULT_CONFIG_FI_DEPENDENT|DL_TIMER_FAULT_CONFIG_FIEN_ENABLED);
    [Edit: Fixed multiple (FENACT) naming conventions]
  • One is latching, one not....so it is not really possible.

    Since we don't have a real solution, we will continue with some added external logic.

    Many thanks for your help!