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MSPM0C1106: ADC Samp CLK vs ADCCLK

Part Number: MSPM0C1106
Other Parts Discussed in Thread: MSPM0C1105

Hello,

Just so I'm clear on the topic, from this diagram in the TRM:

image.png

 

On MSPM0C1106 there is no independent adc oscillator correct? So ADCCLK is either ULPCLK or one of the other system clocks?

However for SAMPCLK this can be ADCCLK/ SCLKDIV and this is considered an entirely different clock just for timing the ADC sampling correct?

So sampling occurs for SCOMP0/1 counts of SAMPCLK and then the rest of the ADC conversion happens at ADCCLK?

This diagram doesn't really make that clear, there should be another line for sample clock to deliniate the difference if my understanding is correct.

Finally for what it's worth, I noticed that the MSPM0C TRM still references a 24 MHz max clock speed, shouldn't this now be 32 MHz given that the MSPM0C1106 is 32 MHz?

Munan

  • Hi Munan,
    1. The Sample time should be tied to ADCCLK, so it uses the same clock source.
    2. Based on the diagram, Sampling occurs after two to three ADCCLK cycles, and the ADC conversion starts at the end of the sample window.
    3. I don't think this is correct since I think that the Sample time is derived from ADCCLK
    4. The TRM will eventually reflect the latest changes for the MSPM0C1105/6 family.
    Best Regards,
    Diego Abad

  • How does SCLKDIV factor into sample time then?

    So is this saying that sample clk = adc clk and that to get the sample time you use scomp0.val * adcclk/ sclk_div (the actual divider value not the value of that register)

    You see how that's not exactly clear in the diagram since scomp0.val does not translate directly into number of adc clock cycles?

    Munan

  • Hi Munan,
    Let me consult with my team for further confirmation on it.

    Best Regards,

    Diego Abad

  • Hi Munan,
    The sampling time is generally = SCLKDIV programmed value * Scomp value * sampling clock period.

    Sometimes it can be that If SCLKDIV value is 2 then we need to multiply with 4, then can be checked in TRM

    Best Regards,

    Diego Abad