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Original question:

AM2634-Q1: RTI interrupt type should be pulse but not level?

AM2632: RTI interruption issue

wegin yao
Prodigy 70 points

Part Number: AM2632

Hi experts,

Recently, I have been using the RTI interrupt function based on the AM2632 chip. During an initialization step, I discovered that as long as I set the RTI-related bits in VIM_STS_2 to 1, even though the interrupt enable for RTI was turned on and the interrupt type for RTI was set to level-triggered, the corresponding RTI bit in VIM_STS_2 would no longer be set to 1.image.png

Here is my question:

Since the interrupt type of RTI has been set to level-triggered.  Even if I clear the pending bit of RTI in VIM_STS_2. It will set immediately because the interruption source is still setting.

However, the actual situation is not like this. The corresponding bit in VIMSTS_2 has never been set to 1 again.