MSPM0G3519: Cannot reset INITDONE using CSC

Part Number: MSPM0G3519


I am attempting to modify the CSC examples from the SDK to boot a custom image on an MSPM0G3519, I have enabled UART prints inside CSC using driver, which as increased the CSC image size slightly. Attempting to boot the image fails because the INITDONE flag is already set, new keystore data cannot be written and the lock storage boot status is set to LOCKSTG_BOOT_STATUS_FAILURE. 

How can the INITDONE flag be reset in the SECSTATUS register? The register is read only.

  • You need trigger a boot reset to clear initdone flag, and please refer to below flow: ignore the bankswap if you not use it.

    MSPM0 Initdone.pdf

  • I have triggered a boot reset and a sys reset using the DL_SYSCTL_resetDevice(DL_SYSCTL_RESET_BOOT); call and neither method has worked to reset the INITDONE flag. Is there another method that must be used to trigger a reset?

  • For the security reason, INITDONE control is limited by hardware.

    Any reset higher than boot reset can clear initdone flag, like a power on reset.

    In CSC, there are two condition, one is just power on and running CSC with initdone clear.

    another is just run from a reset that triggered by previous CSC and run into CSC again with initdone set.

  • Power cycling the board also does not reset the INITDONE flag, DL_SYSCTL_isINITDONEIssued() always returns true even after a power cycle.

  • I'm also using Hard Reset in the debugger settings, I assume this would also trigger a POR?

  • Please try to stop before init done is issued.

    You can add a 10s delay before initdone and try to connect to MSPM0 with project-less debug, in this 10s, after power on, you will have enough time to monitor it.

    I'm also using Hard Reset in the debugger settings, I assume this would also trigger a POR?

    This can also works, push reset button 1s, then debug will stop, try to connect it again, I can also see initdone is cleared.

  • hi guys, Sorry to jump into conversation. actually, similar kind of issue i am facing. bank swap not happened even if code correctly setting execution from upper flash but after reset failed to run that program. 

    when I kept firmware in both bank code jump to application. as in csc code always boot from primary_slot_offset. but when there is only one image and it's in bank 1 then i think bank swap doesn't take place that's why after reset code start csc from bank 0 and try to jump to primary slot offset it doesn't get code there because bank swap didn't take place. 

    also is there any way to do bank swap with intervention of initdone?  i have checked intidone status after normal power cycle of board it always in set state. as if i am getting initdone state set then during image verification step even if i set bank swap and set to execute from upper slot it won't take effect as initdone already set. I don't know how to clear initdone state.

  • MSPM0 Initdone.pdf

    Please follow the guidance above.

    Some reset level can clear initdone, like PoR.

    CSC need for firmware download into device, boot 0, boot 1, app 0 and app 1. 0 and 1 means lower and upper bank.

  • I have been able to clear initdone and successfully trigger a bank swap by power-cycling the board. However, in order to make use of CSC as a bootloader, the bank swap must be issued remotely, a customer in the field cannot manually power cycle all boards to issue a bank swap and continue a firmware update. How can initdone be cleared via a software reset?

  • Answering my own question, POR can be issued from SW by using DL_SYSCTL_resetDevice(DL_SYSCTL_RESET_POR);