AM2634: issue with configuring ECC and ESM in all memory area

Part Number: AM2634

this is just a summary of the problem that I have with ESM and ECC

when I run the example code with configure only one memory subtype (in this case its SDL_MCAN0)

the ECC is init correctly with no issue and I can see the ERROR pin high (its an led)

when I try to configure all memory in the same time using 

static const SDL_MemConfig_t SDL_R5FSS0_CORE0_ECC_AGGR_MemEntries[SDL_R5FSS0_CORE0_ECC_AGGR_RAM_IDS_TOTAL_ENTRIES] =

in source/sdl/ecc/soc/am263x/sdl_ecc_soc.h , the SDL_ECC_initMemory return no error, but SDL_ECC_init return -1 and the ERROR pin led doesn't turn on

I was thinking that the ESM could be the one causing this issue so I did found the maskbit to configure it in a example file C:\ti\mcu_plus_sdk_am263x_10_01_00_31\examples\sdl\integrated_examples\sdl\esm.c and use them to configure it

// all ECC
#define ESM_ENABLE_BITMAP_ECC_ALL      (ESM_ENABLE_BITMAP_MCAN0ECC_G0 | \
                                        ESM_ENABLE_BITMAP_ICSSMECC_G2 | \
                                        ESM_ENABLE_BITMAP_MSSL2ECC_G0 | \
                                        ESM_ENABLE_BITMAP_R5F0ECC_G1 |  \
                                        ESM_ENABLE_BITMAP_ECCBUSC_G1 |  \
                                        ESM_ENABLE_BITMAP_ECCBUSC_G1 |  \
                                        ESM_ENABLE_BITMAP_TPTC_G0)

#define ESM_PRIORITY_ECC_ALL           (ESM_PRIORITY_MCAN0ECC_G0 | \
                                        ESM_PRIORITY_ICSSMECC_G2 | \
                                        ESM_PRIORITY_MSSL2ECC_G0 | \
                                        ESM_PRIORITY_R5F0ECC_G1 |  \
                                        ESM_PRIORITY_TPTC_G0)

#define ESM_ERRORP_ECC_ALL             (ESM_ERRORP_MCAN0ECC_G0 | \
                                        ESM_ERRORP_ICSSMECC_G2 | \
                                        ESM_ERRORP_MSSL2ECC_G0 | \
                                        ESM_ERRORP_R5F0ECC_G1 |  \
                                        ESM_ERRORP_ECCBUS_G1 |  \
                                        ESM_ERRORP_ECCBUS_G0 |  \
                                        ESM_ERRORP_TPTC_G2)

static SDL_ECC_InitConfig_t ECC_Test_R5FSS0_CORE0_ECCInitConfig =
{
    .numRams = SDL_R5FSS0_CORE0_ECC_AGGR_RAM_IDS_TOTAL_ENTRIES,
    /**< Number of Rams ECC is enabled  */
    .pMemSubTypeList = &(SDL_R5FSS0_CORE0_ECC_AGGR_MemEntries[0].memSubType),
    /**< Sub type list  */
};

int32_t ECC_Example_init (void)
{
    int32_t retValue=0;
    SDL_ErrType_t result;
    void *ptr = (void *)&arg;
    /* Initialise exception handler */
    ECC_Test_exceptionInit();

    DebugP_log("\r\nECC_Test_init: Exception init complete \r\n");

    /* Initialize ECC Memory */
    for (int i = 0; i < SDL_R5FSS0_CORE0_ECC_AGGR_RAM_IDS_TOTAL_ENTRIES; i++)
    {
        result = SDL_ECC_initMemory(SDL_R5FSS0_CORE0_ECC_AGGR, SDL_R5FSS0_CORE0_ECC_AGGR_MemEntries[i].memSubType);
        if (result != SDL_PASS) {
            /* print error and quit */
            DebugP_log("\r\nECC_Test_init: Error initializing Memory of R5FSS0 CORE0 ECC: result = %d\r\n", result);
            retValue = -1;
            return retValue;
        }
    }
    /* Initialize ESM module */
    result = SDL_ESM_init(SDL_ESM_INST_MAIN_ESM0, &ECC_Test_esmInitConfig_MAIN, SDL_ESM_applicationCallbackFunction, ptr);
    if (result != SDL_PASS) {
        /* print error and quit */
        DebugP_log("\r\nESM_Test_init: Error initializing MSS ESM: result = %d\r\n", result);
        retValue = -1;
        return retValue;
    }

    /* Initialize ECC */
    result = SDL_ECC_init(SDL_R5FSS0_CORE0_ECC_AGGR, &ECC_Test_R5FSS0_CORE0_ECCInitConfig);
    if (result != SDL_PASS) {
        /* print error and quit */
        DebugP_log("\r\nECC_Test_init: Error initializing R5FSS0 CORE0 ECC: result = %d\r\n", result);
        retValue = -1;
        return retValue;
    }
    return retValue;
}