Part Number: MSPM0G3507
Other Parts Discussed in Thread: UNIFLASH, MSPM0G5117
Hi Ti teams,
I have an urgent issue. When I program the board using CCS, everything works fine. But when I generate a HEX file from CCS and program it using UniFlash, the first programming works normally and shows “program successfully.”
The problem is that when I try to program the same board a second time, I can no longer perform any operations on it (including erase or program).
Logs:
[2025/11/19 9:21:35] [ERROR] CORTEX_M0P: Error connecting to the target: Connection to MSPM0 core failed. Possible root causes: 1) Debug access within NONMAIN was disabled or enabled with password. 2) Peripheral mis-configuration (e.g improper watchdog or clock). To see a more detailed diagnostic of the issue, please press the 'Read boot diagnostic' button.
[2025/11/19 9:21:37] [ERROR] CORTEX_M0P: Error connecting to the target: Connection to MSPM0 core failed. Possible root causes: 1) Debug access within NONMAIN was disabled or enabled with password. 2) Peripheral mis-configuration (e.g improper watchdog or clock). To see a more detailed diagnostic of the issue, please press the 'Read boot diagnostic' button.
[2025/11/19 9:21:37] [INFO] CS_DAP_0: GEL Output: Device diagnostic read = 0x00000007
[2025/11/19 9:21:37] [INFO] CS_DAP_0: GEL Output: Possible root causes from diagnostic reading: 1) Nested exception (e.g double hard fault or NMI) can be caused by illegal CPU activity such as invalid address modification 2) Debug access has been disabled Possible recovery method: 1) Perform a DSSM factory reset with or without password 2) Power cycle or reset the device
[2025/11/19 9:21:41] [ERROR] CORTEX_M0P: Error connecting to the target: Connection to MSPM0 core failed. Possible root causes: 1) Debug access within NONMAIN was disabled or enabled with password. 2) Peripheral mis-configuration (e.g improper watchdog or clock). To see a more detailed diagnostic of the issue, please press the 'Read boot diagnostic' button.
Even when I switch back to CCS, I’m still unable to communicate with the board.
Is this a protection mechanism from TI? Could you provide any suggestions for us?
Best regards,
Mike
