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AM2634-Q1: RTI timer start

karthi keyan
Prodigy 20 points
Part Number: AM2634-Q1
Other Parts Discussed in Thread: AM2634

Hi TI team,

as per our requirement we need 5 type of timers, previousely we used RTI0 with 4 comparators and RTI1 with 1 comparator. but now we planned to use RTI0, RTI1,RTI2,RTI3,RTI4 (1 comparator).

Issuses:

  1. RTI0_isr() and RTI4_isr() only enabling and other timers are not enabling. 
  2. we open the RTI channels, enable the RTI timers. Even though we could not able to create the interrupt on RTI1_isr(), RTI2_isr() and RTI3_isr().
  3. Is that possible to use different RTI timers?

herewith attached the config as below,

image.png

image.png

image.png

image.png

image.png

these are the above configuration done and we have got below code which generated by the CCS,

void Drivers_rtiOpen(void)
{
    HwiP_Params rtiHwiParams;
    int32_t status;
    uint32_t baseAddr;
    uint64_t timeInNsec;
    uint32_t cntrPrescaler;
    uint32_t compPrescaler;

    baseAddr = CONFIG_RTI0_BASE_ADDR;

    /* Configure RTI input clock source */
    SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);
    *(volatile uint32_t*)AddrTranslateP_getLocalAddr(CONFIG_RTI0_CLOCK_SRC_MUX_ADDR) = CONFIG_RTI0_CLOCK_SRC_WUCPUCLK;
    SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);

    /* Enable/Disable Continue on Suspend */
    RTIG_setStallMode(baseAddr, RTI_GC_STALL_MODE_OFF);

 

    /* Configure Compare event 0 */
    timeInNsec = CONFIG_RTI0_NSEC_PER_TICK_COMP0;
    if(timeInNsec == 0)
    {
        timeInNsec = CONFIG_RTI0_USEC_PER_TICK_COMP0 * 1000U;
    }
    compPrescaler = (timeInNsec*CONFIG_RTI0_COMP0_INPUT_CLK_HZ)/1000000000;

    RTI_compareEventConfig(baseAddr, RTI_TMR_CMP_BLK_INDEX_0, CONFIG_RTI0_COMP0_SRC, compPrescaler, compPrescaler);
    RTI_intStatusClear(baseAddr, RTI_TMR_INT_INT0_FLAG);
    HwiP_Params_init(&rtiHwiParams);
    rtiHwiParams.intNum = CONFIG_RTI0_INT_NUM_EVENT0;
    rtiHwiParams.callback = RTI0_event0Isr;
    rtiHwiParams.isPulse = 0;
    rtiHwiParams.priority = 1;
    status = HwiP_construct(&gRtiEvent0HwiObj[CONFIG_RTI0], &rtiHwiParams);
    DebugP_assertNoLog(status==SystemP_SUCCESS);

    RTI_intEnable(baseAddr, RTI_TMR_INT_INT0_FLAG);

    RTI_intDisable(baseAddr, RTI_TMR_INT_DMA0_FLAG);


    baseAddr = CONFIG_RTI1_BASE_ADDR;

    /* Configure RTI input clock source */
    SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);
    *(volatile uint32_t*)AddrTranslateP_getLocalAddr(CONFIG_RTI1_CLOCK_SRC_MUX_ADDR) = CONFIG_RTI1_CLOCK_SRC_WUCPUCLK;
    SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);

    /* Enable/Disable Continue on Suspend */
    RTIG_setStallMode(baseAddr, RTI_GC_STALL_MODE_OFF);

 

    /* Configure Compare event 0 */
    timeInNsec = CONFIG_RTI1_NSEC_PER_TICK_COMP0;
    if(timeInNsec == 0)
    {
        timeInNsec = CONFIG_RTI1_USEC_PER_TICK_COMP0 * 1000U;
    }
    compPrescaler = (timeInNsec*CONFIG_RTI1_COMP0_INPUT_CLK_HZ)/1000000000;

    RTI_compareEventConfig(baseAddr, RTI_TMR_CMP_BLK_INDEX_0, CONFIG_RTI1_COMP0_SRC, compPrescaler, compPrescaler);
    RTI_intStatusClear(baseAddr, RTI_TMR_INT_INT0_FLAG);
    HwiP_Params_init(&rtiHwiParams);
    rtiHwiParams.intNum = CONFIG_RTI1_INT_NUM_EVENT0;
    rtiHwiParams.callback = RTI1_event0Isr;
    rtiHwiParams.isPulse = 0;
    rtiHwiParams.priority = 2;
    status = HwiP_construct(&gRtiEvent0HwiObj[CONFIG_RTI1], &rtiHwiParams);
    DebugP_assertNoLog(status==SystemP_SUCCESS);

    RTI_intEnable(baseAddr, RTI_TMR_INT_INT0_FLAG);

    RTI_intDisable(baseAddr, RTI_TMR_INT_DMA0_FLAG);


    baseAddr = CONFIG_RTI2_BASE_ADDR;

    /* Configure RTI input clock source */
    SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);
    *(volatile uint32_t*)AddrTranslateP_getLocalAddr(CONFIG_RTI2_CLOCK_SRC_MUX_ADDR) = CONFIG_RTI2_CLOCK_SRC_WUCPUCLK;
    SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);

    /* Enable/Disable Continue on Suspend */
    RTIG_setStallMode(baseAddr, RTI_GC_STALL_MODE_OFF);

 

    /* Configure Compare event 0 */
    timeInNsec = CONFIG_RTI2_NSEC_PER_TICK_COMP0;
    if(timeInNsec == 0)
    {
        timeInNsec = CONFIG_RTI2_USEC_PER_TICK_COMP0 * 1000U;
    }
    compPrescaler = (timeInNsec*CONFIG_RTI2_COMP0_INPUT_CLK_HZ)/1000000000;

    RTI_compareEventConfig(baseAddr, RTI_TMR_CMP_BLK_INDEX_0, CONFIG_RTI2_COMP0_SRC, compPrescaler, compPrescaler);
    RTI_intStatusClear(baseAddr, RTI_TMR_INT_INT0_FLAG);
    HwiP_Params_init(&rtiHwiParams);
    rtiHwiParams.intNum = CONFIG_RTI2_INT_NUM_EVENT0;
    rtiHwiParams.callback = RTI2_event0Isr;
    rtiHwiParams.isPulse = 0;
    rtiHwiParams.priority = 3;
    status = HwiP_construct(&gRtiEvent0HwiObj[CONFIG_RTI2], &rtiHwiParams);
    DebugP_assertNoLog(status==SystemP_SUCCESS);

    RTI_intEnable(baseAddr, RTI_TMR_INT_INT0_FLAG);

    RTI_intDisable(baseAddr, RTI_TMR_INT_DMA0_FLAG);


    baseAddr = CONFIG_RTI3_BASE_ADDR;

    /* Configure RTI input clock source */
    SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);
    *(volatile uint32_t*)AddrTranslateP_getLocalAddr(CONFIG_RTI3_CLOCK_SRC_MUX_ADDR) = CONFIG_RTI3_CLOCK_SRC_WUCPUCLK;
    SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);

    /* Enable/Disable Continue on Suspend */
    RTIG_setStallMode(baseAddr, RTI_GC_STALL_MODE_OFF);

 

    /* Configure Compare event 0 */
    timeInNsec = CONFIG_RTI3_NSEC_PER_TICK_COMP0;
    if(timeInNsec == 0)
    {
        timeInNsec = CONFIG_RTI3_USEC_PER_TICK_COMP0 * 1000U;
    }
    compPrescaler = (timeInNsec*CONFIG_RTI3_COMP0_INPUT_CLK_HZ)/1000000000;

    RTI_compareEventConfig(baseAddr, RTI_TMR_CMP_BLK_INDEX_0, CONFIG_RTI3_COMP0_SRC, compPrescaler, compPrescaler);
    RTI_intStatusClear(baseAddr, RTI_TMR_INT_INT0_FLAG);
    HwiP_Params_init(&rtiHwiParams);
    rtiHwiParams.intNum = CONFIG_RTI3_INT_NUM_EVENT0;
    rtiHwiParams.callback = RTI3_event0Isr;
    rtiHwiParams.isPulse = 0;
    rtiHwiParams.priority = 4;
    status = HwiP_construct(&gRtiEvent0HwiObj[CONFIG_RTI3], &rtiHwiParams);
    DebugP_assertNoLog(status==SystemP_SUCCESS);

    RTI_intEnable(baseAddr, RTI_TMR_INT_INT0_FLAG);

    RTI_intDisable(baseAddr, RTI_TMR_INT_DMA0_FLAG);


    baseAddr = CONFIG_RTI4_BASE_ADDR;

    /* Configure RTI input clock source */
    SOC_controlModuleUnlockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);
    *(volatile uint32_t*)AddrTranslateP_getLocalAddr(CONFIG_RTI4_CLOCK_SRC_MUX_ADDR) = CONFIG_RTI4_CLOCK_SRC_WUCPUCLK;
    SOC_controlModuleLockMMR(SOC_DOMAIN_ID_MAIN, MSS_RCM_PARTITION0);

    /* Enable/Disable Continue on Suspend */
    RTIG_setStallMode(baseAddr, RTI_GC_STALL_MODE_OFF);

 

    /* Configure Compare event 0 */
    timeInNsec = CONFIG_RTI4_NSEC_PER_TICK_COMP0;
    if(timeInNsec == 0)
    {
        timeInNsec = CONFIG_RTI4_USEC_PER_TICK_COMP0 * 1000U;
    }
    compPrescaler = (timeInNsec*CONFIG_RTI4_COMP0_INPUT_CLK_HZ)/1000000000;

    RTI_compareEventConfig(baseAddr, RTI_TMR_CMP_BLK_INDEX_0, CONFIG_RTI4_COMP0_SRC, compPrescaler, compPrescaler);
    RTI_intStatusClear(baseAddr, RTI_TMR_INT_INT0_FLAG);
    HwiP_Params_init(&rtiHwiParams);
    rtiHwiParams.intNum = CONFIG_RTI4_INT_NUM_EVENT0;
    rtiHwiParams.callback = RTI4_event0Isr;
    rtiHwiParams.isPulse = 0;
    rtiHwiParams.priority = 5;
    status = HwiP_construct(&gRtiEvent0HwiObj[CONFIG_RTI4], &rtiHwiParams);
    DebugP_assertNoLog(status==SystemP_SUCCESS);

    RTI_intEnable(baseAddr, RTI_TMR_INT_INT0_FLAG);

    RTI_intDisable(baseAddr, RTI_TMR_INT_DMA0_FLAG);

}

 

and we are enable the  RTI timers as below,

image.png

here are the things have done in the code, but not working, can anyone guide in this?

thanks, 

karthikeyan.S

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

  • 0
    TI__Mastermind 18562 points

    Hi Karthikeyan,

    I have a few questions:

    1. I see you have configured RTI1 and RTI2 in two different configs.The AM2634 device only has 4 RTIS (RTI0..RTI3), Do you intentionally wish to override the initial configs and create duplicate ones?

    2. Can you please explain the below point?

    karthi keyan said:
    Even though we could not able to create the interrupt on RTI1_isr(), RTI2_isr() and RTI3_isr().

    3. You have not specified the interrupt callback functions in RTI configs. Can you define that? Please refer the RTI LED blink example in the SDK and refer the example.syscfg,

    karthi keyan said:
    RTI0_isr() and RTI4_isr() only enabling and other timers are not enabling. 

    karthi keyan said:
    Is that possible to use different RTI timers?

    It is indeed possible to use different timers in the application. Just make sure you handle the priorities efficiently according to your application's use-case.

    Regards,
    Shaunak

  • 0
    Prodigy 20 points

    Hi Shaunak,

    answers to your questions:

    1. I see you have configured RTI1 and RTI2 in two different configs.The AM2634 device only has 4 RTIS (RTI0..RTI3), Do you intentionally wish to override the initial configs and create duplicate ones?

    Ans: i want to create 5 timers and CCS config used the RTI1,2 and 3.

    2. Can you please explain the below point?

    karthi keyan said:
    Even though we could not able to create the interrupt on RTI1_isr(), RTI2_isr() and RTI3_isr().
    Ans: CCS config created isr Callback as RTI0isr(),RTI1isr(),RTI2isr(),RTI3isr(),RTI4isr(). in that RTI0 isr() and RTI4 only hitting. 

    3. You have not specified the interrupt callback functions in RTI configs. Can you define that? Please refer the RTI LED blink example in the SDK and refer the example.syscfg,

    karthi keyan said:
    RTI0_isr() and RTI4_isr() only enabling and other timers are not enabling. 
    karthi keyan said:
    Is that possible to use different RTI timers?
    Ans: interrupt functions are not available in the attached images. Those images created by CCS config. in real code we have isr call back functions in rti.c.

    It is indeed possible to use different timers in the application. Just make sure you handle the priorities efficiently according to your application's use-case.

    Ans: priorities are handled as per attached code. 

    Ques: i need 5 timers and how i can configure it??

    thanks,

    Karthikeyan.S

  • 0 in reply to karthi keyan
    TI__Mastermind 18562 points

    Hi Karthikeyan,

    Since we only have 4 physical RTI timers on the AM263x device, you can only configure 4 RTIs (RTI0, RTI1, RTI2, RTI3). You cannot configure 5 independent timers on the device, since the device only 4 RTI timers. Either you will have to use the timers of RTI separately (which i see you were doing before) OR 

    Other than this, you have 4 watchdog timers. If your use-case can rely on the watchdog timer, you can use that and keep servicing the watchdog. Internally, the RTI and watchdog IP are pretty similar in function.

    Regards,
    Shaunak

  • 0 in reply to Shaunak Deshpande
    Prodigy 20 points

    Hi Shaunak,

    1. Thanks for your quick response, i would like to use RTI timers only. but the timer instance available in configuration is RTI1, RTI2 and RTI 3 only.

    Here.

    2. I have one more doubt, should i enable the counter block in every timer. Like in RTI LED Blink example SDK.

    3. Sometime our RTI timers interrupt is not enabling, and other timers (comparator) is working. What could be the reasons and how to avoid / restart.

    Thanks. 

    Karthikeyan.S

  • 0 in reply to karthi keyan
    TI__Mastermind 18562 points

    Hi Karthikeyan,

    1. RTI0 is blocked by the clock module (tick timer).

    2. This is not changable (one RTI has to be allocated to systick/heartbeat)

    3. This is a bit weird. As long as you ensure priorities are different for all Timer interrupts, it should trigger interrupts independently. I'll need some more details to understand this. Can you share your project as a zip please? 

    Regards,
    Shaunak

  • 0 in reply to Shaunak Deshpande
    Prodigy 20 points

    Hi Shanauk,

    i am sorry, the project is confidential and i am not able to share with you, i hope you have understood my requirement, can you please any suitable example project.

    regards,

    karthikeyan.S

  • 0 in reply to karthi keyan
    TI__Mastermind 18562 points

    Hi Karthikeyan

    There is no such project in the SDK which uses all the timers. It should be pretty straight forward to create such an example but right now i don't have the bandwidth due to internal development activities. Can you follow the procedure shared in my above replies and try creating such an example?

    You just need to add all RTI instances, make sure the syscfg has all the required parameters (priorities, counter and compare blocks set, ISR callback), it should work.

    Alternatively, do you mind sharing what is the exact application that requires 5 different independent timers.

    Also, on other note, since you have a requirement for 5 independent RTI timers, have you considered the AM263Px device? It has 8 RTI timers and the device is pretty much the same, rather an enhanced version of the AM263Px, with some packages being pin to pin compatible.

    AM263x (what you are using): https://www.ti.com/product/AM2634

    AM263Px: https://www.ti.com/product/AM263P4

    I know just migrating for a missing timer is something that you wouldn't really consider but i wanted to share the details in case you find the other device suitable as well.

    Regards,
    Shaunak