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MSPM0G3507: Programming via external XDS110

Part Number: MSPM0G3507

Hi Team,

Posting on behalf of our customer.

I'm trying to use the XDS110-ET on an LP-MSPM0G3507 LaunchPad to program an external MSPM0G3507SRHBR chip following section 2.3.6 of the LaunchPad User's Guide.

Current connections:

  • Removed all J101 jumpers
  • Connected J102 SWDIO -> target SWDIO (PA20)
  • Connected J102 SWCLK -> target SWCLK (PA19)
  • Connected GND
  • Target NRST is hard-wired to VDD (pullup only, no external access)

Errors received: 

  1. Error connecting to the target: DAP Connection Error. This could be caused by the device having gone to low power mode. Try forcing an external reset.
  2. CS_DAP_0: Error connecting to the target: (Error -614 @ 0x0) 
    The target indicates there is an error condition from a previous SWD  request. 
    Clear the error the condition, and try the SWD request again. (Emulation package 20.1.0.3429) 

My questions:

  1. Is connecting J102 NRST to the target NRST pin mandatory for initial programming of a blank chip? Since no application code has ever run, the device shouldn't be in low-power mode or have SWD disabled.
  2. Does the XDS110 require NRST control even for the initial SWD connection handshake, or should SWDIO/SWCLK be sufficient for a factory-fresh device?
  3. The datasheet (SLAU846B section 9.1.1, Figure 9-1) shows NRST with 47kΩ pullup + 10nF cap, and the debug tool connection diagram includes NRST. Is this connection mandatory, or just recommended for debugging running code?

 

Regards,

Danilo

  • Hi Danilo,

    Is connecting J102 NRST to the target NRST pin mandatory for initial programming of a blank chip? Since no application code has ever run, the device shouldn't be in low-power mode or have SWD disabled.

    For a blank device, NRST line is not required for programming. At this case, device enter standby0 low power mode after power up with 10s, but XDS110 support to program when device in standby0 mode.

    Does the XDS110 require NRST control even for the initial SWD connection handshake, or should SWDIO/SWCLK be sufficient for a factory-fresh device?

    This is also not must to have, but better to have as if device enter fault status (example: image program flow broken due to hardware connection issue or noise issue), then it might need NRST to program again.

    Is this connection mandatory, or just recommended for debugging running code?

    Better to have. As in debug/program phase, there will have accident that program break, which need reset signal to generate recover flow.

    B.R.

    Sal

  • Hi Sal, 

    How does NRST work in launchpad (LP-MSPM0G3507)? I probed the NRST pin in my launchpad, it is always high. Even after I remove NRST header from J101 I'm able to continue to program, debug without issues?

    I was under the impression. NRST needs to go low while we program the device and stays high otherwise, am I wrong here?

    I did this because, I was trying to program my external device (MSPM0G3507SRHBR) with XDS110, but it doesn't work, I checked for SWCLK and SWDIO signals they are fine and NRST is also always high, so I'm not sure what is going wrong. When board reset is performed, the NRST does toggle. 

    GEL Output: Initiating BOOTRST Board Reset
    GEL Output: Reset line asserted
    GEL Output: Reset line de-asserted
    GEL Output: Board Reset Complete
    GEL Output: Reset done

    I'm very confused at the moment. Any suggestions would be helpful. Thanks.

  • Hi A.B

    NRST needs to go low while we program the device and stays high otherwise, am I wrong here?

    NRST should keep high during program.

    Generate NRST low pulse is just to force MCU reset and re-run the boot code, during boot code execution, the IDE/Progam tools can do debug connection and message transmission to process some unique operation, for example - factory reset, mass erase.

    I was trying to program my external device (MSPM0G3507SRHBR) with XDS110

    I think this not related to NRST line, try use XDS110 to power the device, maybe your on-board LDO can not afford the power consumption during flash erase and program.

    B.R.

    Sal