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MSPM0G3107: SPI

Dipkumar Vala
Prodigy 75 points

Part Number: MSPM0G3107
Other Parts Discussed in Thread: CC110L

I have configured one of the pins as an SPI POCI (MISO) pin. Now I want to read its current logic level (high or low).
However, when I try to read the DIO register, the value doesn’t update.
How can I correctly read the state of the pin when it is configured for the SPI peripheral?

  • 0
    TI__Mastermind 28685 points

    Hi Dipkumar,

    Dipkumar Vala said:
    I have configured one of the pins as an SPI POCI (MISO) pin. Now I want to read its current logic level (high or low).

    What is the requirement to read this GPIO pin level? I can not imagine a use case, could you share some background for me?

    How about connect additional pin to this POCI pin?

    B.R.

    Sal

  • 0 in reply to Sal Ye
    Prodigy 75 points

    Hi Sal Ye,

    Sal Ye said:

    What is the requirement to read this GPIO pin level? I can not imagine a use case, could you share some background for me?

    I'm using CC110L and According to the CC110L datasheet:

    When CSn is pulled low, the MCU must wait until the CC110L SO pin goes low before sending the first header byte. The SO pin going low indicates that the crystal is running. 

    So my firmware needs to check the logic level of the SO (MISO/POCI) pin before starting the SPI transfer.
    This is why I need to read the GPIO state.

  • +1 in reply to Dipkumar Vala
    TI__Mastermind 28685 points

    Hi Dipkumar,

    Thanks for the clarifications. 

    I do not find a way to directly read its GPIO status when it set as SPI mode.

    Given the requirement you listed here, I assume M0 works as controller, and CC10L is the slave. Then you can set M0 as 3-wire mode, add an GPIO to take the role as the CSn signal. Then you have enough time to process the POCI pins status check.

     - add a delay before generate SPI packegt.

     - configure the POCI as GPIO and INPUT, while until GPIO read as HIGH, then switch back to SPI (via IOMUX) function and start the SPI transmission.

    B.R.

    Sal