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MSPM0G3519: DMA Transfer on RXD_NEG_EDGE Interrupt of UART Extend Peripheral

Aaron Schwieterman
Prodigy 20 points

Part Number: MSPM0G3519

Hello.  I am working on writing software to interface with a LIN bus via the UART Extend peripheral found on the MSPM0G3519 processor.  By following the LIN reception section of 23.2.3.7 Local Interconnect Network (LIN) Support in the Technical Reference Manual, I was able to detect break fields and sync bytes.  During the sync byte detection, five interrupts are triggered (RXNE) to record the timings of each bit (LINC0 and LINC1 registers) within the sync byte.  To reduce the number of interrupts, I was looking to see if I can use the DMA peripheral to save these timings.  The DMA transfer would send the values of the LINC0 and LINC1 registers to buffers in RAM once the RXNE interrupt is triggered.  In 23.2.7.2 DMA Trigger Publisher of the reference manual, it does not list the RXNE interrupt as one that the DMA supports for the UART peripheral.  Are there other possible strategies to routing the RXNE interrupt event to the DMA peripheral?  Maybe I can route the interrupt event to the GENERIC_SUBx_TRIG trigger via the "events manager"?  If so, how would I accomplish this?  Thank you!

  • 0
    TI__Expert 7455 points

    Hi, thanks for the question! You should be able to use a generic trigger, or even use the DMA for the UART to transfer after it receives x samples but it would also depend on how the rest of your project is set up to get it working properly. A couple of options here for you:

    • This option, you would assign a DMA channel, set it as a subscriber, set all of your other parameters, and either use a generic external trigger, or you also have the option to route directly to the UART channel you are using. Then make sure you have the interrupt on the UART enabled to tie it to the DMA. You can verify this in the Events tab for the PUB/SUB, etc.
    • Another option would be to configure the UART's RX data register full (RXDR) flag to directly trigger a DMA channel, bypassing the CPU interrupt entirely for data movement. to do this set the DMA source to the UART's data register (e.g., EUSCIB0RXBUF for UART0) and the destination to your memory buffer. Select the RXDR or similar event as the DMA trigger source in the device configuration. this option allows for the highest bandwidth, minimal CPU overhead, ideal for continuous data streams (like high baud rates).
  • 0 in reply to Brian Dempsey
    Prodigy 20 points

    Thank you for the information!  Out of the two options, I really like the second one!

    In the Reference Manual and the SDK, I don't see any references about the RXDR flag nor the EUSCIB0RXBUF UART data register.  Can you help me locate where these bits of information are?

  • 0 in reply to Aaron Schwieterman
    TI__Expert 7455 points

    Sorry for the confusion, for the M0 devices the UART module contains three event publishers and no event subscribers. One event publisher (CPU_INT) manages UART interrupt requests (IRQs) to the CPU subsystem through a static event route. The second and third event publishers (DMA_TRIG_RX, DMA_TRIG_TX) are used to setup the trigger signaling for the DMA through DMA event route. for the RXDR, this is the DMA Done on Receive, so you would add this as the interrupt in your UART config, then make sure the UART RX interrupt is enabled.