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AM6442: Question Regarding EVM Power Sequence vs Our Design

Part Number: AM6442
Other Parts Discussed in Thread: TMDS64EVM

In the TMDS64EVM the Power Sequence for the board is shown in the schematics on Page 6 (Rev D)

Similar to the datasheet, it has the 1V8 and 1V8 Analog rails powered, then uses the PG to enable the 1.2V, and after that rail powers up the core voltages (0.75V and 0.85V rails)

In short: 1.8V → 1.2V → 0.75V → 0.85V

We have a design with no DDR and thus no 1.2V rail.
But looking at the timings, we have the core voltages (0.75V and 0.85V) coming up before the 1.8V analog voltages.

Is this a problem? I know it goes off datasheet power sequence recommendations, but with the device in RESET I wasn't able to see an issue...

As for POWER DOWN, we have it implemented so the core voltages are last to power down. It is just the power up.

  • Hi,

    Thanks for reaching out! The power requirements (including sequencing) specified in the AM64 datasheet must be followed with no exceptions. We cannot guarantee the short term or long term behavior of the SoC under conditions that are outside of the spec and have not been fully validated. Also, please refer to the "Pin Connectivity Requirements" section of the datasheet to access the connectivity requirements for unused resources.   

    Thanks,
    Brenda