This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RM57L843: How to configure HalCoGen/use MIBSPI driver API for 2 slaves comms over MIBSPI

Part Number: RM57L843
Other Parts Discussed in Thread: HALCOGEN

Hello,

 

We are using your Hercules RM57 reference board to prototype, and sucessfully can communicate over MIBSPI with one slave over CS0. Now we added a 2nd slave over CS1. How do we configure HalCoGen and use your MIBSPI driver API to switch communicating to two the 2 slaves?

 

Thank you.

  • Hi Sunny,

    Use two different Transfer Groups like below:

    One with CS0 and other one with CS1.

    Whenever you are calling Set data or get data functions use corresponding group number.

    So that group will activate corresponding CS and do the communication.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadesh,

    Thank you. Yes we implemented this in the code and connected CS1 to Transfer Group 1, and CS0 to Transfer Group0 over MIBSPI2, and we switch between both in our BSP code (note same slave parts TMC5072 off of each CS) MIBSPI2 CS0 with Transfer Group 0 connected to that slave works perfectly each time with communication, and we see that on the scope on all 4 lines.

    On further inspection connecting to the MISO,MOSI, CLK and CS1 with a scope, we saw that with CS1 it is not being pulled LOW by the RM57 when we switch to communicate with Transfer Group 1 (CS1 stays HIGH).  Communication over CS0/Data Group0  the RM57 always pulls CS0 LOW successfully. What would cause CS1  not to be pulled LOW properly by the RM57 when CS0 on the same MIBSPI2 bus is pulled LOW correctly?

    Could i.e., it be CS1 be forced HIGH all the time because of MIBSPI2NENA conflict?

    For terminal D3, In PINMUX we selected MIBSPINCS[1] of the available multiplexing options

    But in MIBSPI2 -> MIBSPI2 Port tab, both NENA and CS[1] are enabled in SPI mode. Should I have set NENA to GPIO mode as well (rather then leave it in SPI mode), so RM57 could control D3 as CS[1] and pull it low? Is NENA necessary for MIBSPI2 to work with > 1 slave (one of CS0 and one on CS1)?

    Thank you again,

    Tammy 

  • Hi Sunny,

    Could i.e., it be CS1 be forced HIGH all the time because of MIBSPI2NENA conflict?

    Maybe. Please configure ENA pin in GIO functionality.

    This is not required for your communication; ENA pin is used by slaves which want to slow down the communication. If we configure ENA pin in SPI mode, then master expects an active low on this pin before initiating communication.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadish,  Thank you. I changed ENA to GPIO mode but CS1 is not pulled low still like CS0 is (I can see on the scope CS0 goes low but CS1 still not going LOW). Is there something else that can keep CS1 from being pulled LOW?

  • Hi Sunny, 

    Is it possible to share your complete project, you can zip it and attach it.

    If needed you can send it through private chat as well, that enables easy debugging from my end.

    --
    Thanks & regards,
    Jagadish.

  • Hi Jagadish,

    Forgive me have been out for the holidays. Yes that would be great. How can I send the project via a private chat?  Thank you again.

  • Hi Sunny,

    I sent you a friend request, please check in your notifications. Once you accept friend request, i will send a Hi in private chat then you can send me project over private chat.

    --
    Thanks & regards,
    Jagadish.

  • Thank you Jagadish, We will create a cleaned up project for you without proprietary info and upload.  Quick question, for looing up in the code, which RM57 register(s) is used to enable MIBSPI2 CS1 if I wanted to doublecheck that it is not disabled? Thank you again. 

  • Hi Sunny,

    Thank you Jagadish, We will create a cleaned up project for you without proprietary info and upload. 

    Sure, that would be good.

    Quick question, for looing up in the code, which RM57 register(s) is used to enable MIBSPI2 CS1 if I wanted to doublecheck that it is not disabled?

    We need to select required CS for transfer group like as shown below.

    Once we did this and the corresponding CS pin is in SPI mode like as shown below:

    Once we did these two then any writes or reads to the corresponding transfer group will automatically control the CS line at hardware level.

    --
    Thanks & Regards,
    Jagadish.

  • Hi Jagadish, Just an update, when we were cleaning up the project discovered the root cause problem and now it works. Thank you.