Hi Experts,
We have a new design where noise generated by switching a relay is interfering with the SPI communications. We are using Motorola 4-wire SPI format (peripheral, 8 bit data, SPH = 0, SPO = 0, CSCLR = 1). The controller brings CS low, waits a bit, sends a series of data bytes waiting a bit after each byte, then brings CS high. There is then a delay of about 20 ms before CS is then brought low again for the next message. It appears that the noise is causing the SPI shift registers to get out of sync, and the communications stay out of sync for many messages until subsequent relay switching noise seems to clear the issue. I would expect perhaps one or two messages to fail, but that CSCLR would get things back in sync. This does not appear to be happening.
Is there something wrong with the CSCLR functionality or something else that could be causing this? I've reviewed the technical reference manual for CSCLR and I believe all the necessay timing requirements are being met.
The only other thing I noticed is that if I use my debugger to attach to the running target, pausing the execution and then continuing the execution also seems to clear the error state.
Regard,
Brian
