Hi Team,
I am working with MSPM0G3507 and experimenting with MCLK monitor enabled while using the WWDT.
After enabling the MCLK monitor, I tried to simulate a clock failure by intentionally shorting the external high-frequency clock pins. During this testing, I observed some unexpected behaviour.
Test setup
Device: MSPM0G3507
External HF crystal connected to HFXIN / HFXOUT
MCLK monitor enabled
WWDT enabled
Clock failure simulated by shorting pins manually
Observations
HFXIN shorted to GND
In some cases, the device resets as expected (BOOTRST), which matches the MCLK monitor behaviour.
However, in other cases, the device does not reset, and instead the system clock appears to run much slower.
HFXIN shorted to HFXOUT
The device continues running, but the system clock appears to become approximately 2× faster than the expected frequency.
Questions
- Is this behaviour expected when shorting HFXIN/HFXOUT or HFXIN to GND?
- How does the internal clock detection / MCLK monitor behave under partial or abnormal oscillation conditions?
- Why would the clock slow down instead of triggering a reset in some cases?
- Why does shorting HFXIN to HFXOUT result in a faster clock?
- Is there a recommended or supported way to reliably simulate an external clock failure for validating MCLK monitor behaviour?
Any clarification or reference to documentation explaining this behaviour would be very helpful.
Thanks & regards,
Preeti