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AM2434: About the Reset Specification

Satoshi Katayama
Prodigy 40 points
Part Number: AM2434


I have a question regarding the reset specification.

In the explanation of MCU_RESETz on page 2729 of the reference manual (spruim2h), the sections MCU Domain Effect and MAIN Domain Effect include the statement “IOs are not effected.”
What functions or settings does this refer to, and what state do they remain in? Please explain in detail.(The same description appears in other reset sources related to WARM RESET.)

MCU_RESETz.jpg



www.ti.com/.../spruim2h.pdf

  • 0
    TI__Intellectual 2710 points

    Hi,

    I’ve assigned your query to the concerned expert. Please note that responses may be delayed due to the Christmas and New Year holidays. Please feel free to ping this thread if you don't receive a response latest by Jan 1st week

    Regards,
    Johnson

  • 0
    TI__Mastermind 22760 points

    Hi,

    I'm sorry for the late response. The marked up sentence means effectively that General-Purpose IOs, in the sense of "multiplex-able SoC pins", will not lose their settings like mux mode (e.g. GPIO, I2C, or UART, etc.) and settings like pull-up/pull-down, drive strength etc. In other words, PADCONF registers are warm-reset insensible, they will not lose values after warm resets as opposed to cold/POR resets.

    Please refer to TRM section 5.1.1.3 CTRL_MMR0 and PADCFG_CTRL0_CFG0 Functional Description for the PADCONF registers and datasheet table Table 5-1. Pin Attributes (ALV, ALX Packages).

    Thanks and regards,

    Stan

  • 0
    Prodigy 40 points

    Dear Stanislav

    Thank you for your answering.

    For example, if the PRU was outputting a PWM signal and a warm reset occurs, does the PWM output from the PRU after the reset is released continue to hold the value it had just before the reset (remaining High or Low)? Or should we also expect behavior where, after the reset is released, the output toggles between High and Low as if the software were still running? Ideally, we would like the system to return to its initial state as defined by the software when a warm reset occurs.

    Regards,

    Satoshi Katayama

  • 0 in reply to Satoshi Katayama
    TI__Mastermind 22760 points

    Hi Katayama-san,

    Regarding pins previously owed by PRU-ICSS, yes they will continue to to be owed by PRU-ICSS after warm resets.

    Now there are two options:

    1. If PRU-ICSS was configured for reset isolation, then it will continue to work during and after warm resets as it was before the warm reset
    2. If PRU-ICSS was not configured for reset isolation, then it will restart and reload software. Delay in the restart of the code will be observed, i.e. some pause in pin activity will be observed. PADCONF settings update may not be required as they will be retained (it's user's choice to update them again) 

    Best regards,

    Stan

  • 0 in reply to Stanislav Stilyanov
    Prodigy 40 points
    Hello,

    Please allow me to confirm the following points.
    By default, is the PRU reset isolated from the MCU and MAIN domains?
    Since we have not configured anything in particular, we assume that the system is currently in its default state.
    Also, if we want to configure reset isolation, which register(s) should we set?
  • 0 in reply to Satoshi Katayama
    TI__Expert 5920 points

    Hello Satoshi Katayama-san,

    Thank you for the additional questions.

    We (me or Stan)  will need some time to internally check.

    We consider the urgency of your request. I hope we are able to provide answers by Monday (Feb-02-2026) COB next week. 

    I appreciate your patience !

    Best Regards,

    Anastas Yordanov