AM2431: About tWPRE in LPDDR4

Part Number: AM2431


We are using LPDDR4 connected to the AM2431.

After performing waveform evaluation, we found that the timing constraint for the Write Preamble (tWPRE) is not being met.

According to the specification, it should be at least 1.8ck, but our measurement shows approximately 0.5ck.
Could you please explain what settings or configurations affect this timing and how we can adjust them to meet the requirement?tWPRE.png