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DMA from Core Register to RAM

Other Parts Discussed in Thread: TMS570LS20216

Hi,

A silly question, but is it possible to DMA from the TMS570LS20216 program counter into RAM? I would be surprised if the PC is in the address space for such an operation, but you never know, it doesn't hurt to ask.

Regards, Tony.

  • Tony,

    Inherently the CPU registers are not memory mapped in the ARM architectures.

    However, we do allow the bus masters on the 570 to access the CoreSight debug logic, which is memory mapped.  If you were very, very clever with the DMA programming you could effectively drive the CoreSight debug logic in the CPU to gain access to the CPU internal registers in the same fashion as a debugger.  I would guess that the payback in getting this to work would probably not be worth the time spent.

    Regards,

    Karl

  • Thanks Karl,

    If anybody has done something like this already and would be willing to share...

    Regards, Tony.

  • Tony,

    I'm not aware of any customer who has taken advantage of the memory mapped debug feature to date.  Here are a few tips that might help:

    • Cortex R4F debug registers are located from 0xFFA0_1000 to 0xFFA0_1FFF
    • The memory mapping for the debug registers is noted in the ARM v7A/R Architecture Reference Manual 
    • The R4F TRM will then tell you which of the above registers are implemented from the architecture
    • All of the debug bus segments are little endian (per ARM requirements) so remember to reformat data if needed
    • Remember that the ARM CoreSight debug modules have a lock/unlock sequence which you need to perform before control registers can be accessed.  This is in place to prevent faults due to spurious access.
    Regards,
    Karl
  • Thanks for the extra info Karl, it will prove useful. I think I'll give it a go! Regards, Tony.