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Original question:

AM2612: ICSS: max encoder implementation

AM2612: PRU-ICSS - PRU0/PRU1 process 3 channel encoders separately

Bolt Hsieh
Prodigy 165 points
Part Number: AM2612
Other Parts Discussed in Thread: AM2434,

Hi experts,

Referencing one PRU using three channels in IF mode in the AM2434 SDK and adapting the approach to the AM2612 PRU-ICSS structure. 

If our team sets PRU0 to Peripheral Interface Mode and uses three channels to connect to EnDat 2.2, BiSS, and Tamagawa encoders (three encoders in total),
can PRU0 process all three encoders successfully?

  • Channel_0 = Endat2.2
  • Channel_1 = BiSS
  • Channel_2 = Tamagawa

If yes, could you provide an example or reference code?

Regarding PRU0 handling the Rx data stream in IF mode, does PRU0 need to process the Rx bit state for each of the three encoder channels simultaneously (Spec. : the Rx FIFO size is 4 bits for oversampling)? 

Regards
Bolt

  • 0
    TI__Genius 17785 points

    Hi,

    Please note that due to the holiday season, there may be some delay in responses. 

    Best Regards,
    Aishwarya

  • 0 in reply to Aishwarya Rajesh
    TI__Mastermind 28294 points

    Bolt
    For implementing 3 channels with 1 PRU, it is difficult to implement 3 EnDat, BiSS-C and Tamagawa. Also, doing independent send/receive on each channel will be challenging task because of limited PRU cycle budget. Single PRU at 200/225 MHz will not be able to handle different types of encoders. Also, certain configurations like clock configuration and interface reset are global level configuration, affecting all 3 channels.

    MOTOR-CONTROL-SDK-AM243X contains single PRU 3 channel examples for same type of encoder, which encoder needing to be of same resolution. In these examples, send and receive of data happens at same time on all 3 channels.

    It will be better to use different PRUs for different types of encoders. For example, Endat 2.2 on PRU0 and BiSS-C on PRU1.

    Regards

    Dhaval

  • 0 in reply to Dhaval Khandla
    Prodigy 165 points

    Hi Dhaval,

    Thank you for your response.

    As a further question, regarding a single PRU core executing one type of encoder: in the PRU-ICSSG architecture, one PRU slice contains three PRU cores—PRU0, RTU-PRU0, and Tx-PRU0. When configured in Load Share mode, are all three cores limited to processing only the same type of encoder, or can they handle the same class of communication type (e.g., asynchronous) while supporting different encoder types (e.g., Nikon and Tamagawa)? Or can the three channels be configured independently, without being constrained by global-level configuration?

    Regards
    Bolt

  • 0 in reply to Bolt Hsieh
    TI__Mastermind 28294 points

    Bolt

    Bolt Hsieh said:
    When configured in Load Share mode, are all three cores limited to processing only the same type of encoder, or can they handle the same class of communication type (e.g., asynchronous) while supporting different encoder types (e.g., Nikon and Tamagawa)?

    HW does not have any hard-coding with respect to encoders in this case. Main challenge/limitation is the global configuration for all 3 channels in 1 slice, which is common for all 3 channels. This mainly includes:
    1. Tx and Rx Clock configuration
    2. Global reinit of TX/RX state/registers after transfer is done

    You can check "6.4.5.2.2.3.6 Three Channel Peripheral Interface" section in AM243x Technical Reference Manual for more details on this interface.

    Regards

    Dhaval