AM263P4-Q1: <ECP> CCM Miscompare Error During CPU/VIM Output Compare Error Forcing

Hi Vandana，

Error forcing test will assert compare error and self-test error. Did you clear the error flag before performing the error forcing test?

Hi Wang, 

Yes I am clearing error flags after each test. 

Hi Vandana，

I will run the test on CC board later today.

Hi Wang,

After completing the tests, could you please update the error flags that are triggered during error forcing mode for all three diagnostics (CPU output compare, VIM output compare, and inactivity monitor). 

Additionally, could you please help me understand the difference between Compare Mismatch error and Miscompare error?

Thank you.

My CC can not be connected. Need to find another one for test.

Hi Wang,

Understood. You may connect and run the checks on your CC board when it becomes available.

In the meantime, could you please share any suggestions on what I should specifically check on my board or BOOT build that might be causing the Miscompare error to be triggered during error forcing mode?

That would help me narrow down the issue while continuing my testing.

Thank you.

I got one AM263Px CC. Did you check the CCMR_CCMSR1 register?

I am checking CCM status register only for self test, I will once try checking now for error forcing mode also. Thankyou

I have monitored the CCM status register, and I do not see any bits set in CCMR_CCMSR1. In only ESM register (0x52D00444), I see triggering of self-test error pulse, compare error pulse, and miscompare error pulse.

                         

HI Vandana,

I didn't see any valid value for CCMR_CCMSR1 in CCS memory browser. 

Vandana Chintala said:

When I am performing error forcing for CPU/VIM output compare (by writing 9), the ESM events observed are CPU compare error pulse, CPU miscompare error pulse, and self-test error.

Which registers are you checking? CCS doesn't have registers pane for AM263P device, and I am not able to add a breakpoint to pause the code execution to check the memory.

Hi Wang,

To pause the code, I am inserting a while(1) loop immediately after configuring the CCM Key Register (by writing 9) and then flashing the code.

This halts execution, after which I use the CCS memory browser to monitor the ESM Group 2 status register at address 0x52D00444
(ESM_PCR_GENERATED_MEMORY_MAP_ERR_GRP_STS_J = 0x52D00404h + formula).

At this address, I consistently observe the value 0x00080140, which indicates that bits 6, 8, and 19 are set — corresponding to CPU compare, CPU miscompare, and self-test error pulses.

I then clear the ESM register and the CCM status register, proceed to the next diagnostic error forcing mode, configure the key register again, and follow the same process to halt execution and check the ESM status register value.

The current issue is that, in error forcing mode, I am observing the miscompare error pulse being triggered in addition to the expected compare and self-test error pulses.