AM263P4-Q1: <ECP> CCM Miscompare Error During CPU/VIM Output Compare Error Forcing

Hi Vandana，

Error forcing test will assert compare error and self-test error. Did you clear the error flag before performing the error forcing test?

Hi Wang, 

Yes I am clearing error flags after each test. 

Hi Vandana，

I will run the test on CC board later today.

Hi Wang,

After completing the tests, could you please update the error flags that are triggered during error forcing mode for all three diagnostics (CPU output compare, VIM output compare, and inactivity monitor). 

Additionally, could you please help me understand the difference between Compare Mismatch error and Miscompare error?

Thank you.

My CC can not be connected. Need to find another one for test.

Hi Wang,

Understood. You may connect and run the checks on your CC board when it becomes available.

In the meantime, could you please share any suggestions on what I should specifically check on my board or BOOT build that might be causing the Miscompare error to be triggered during error forcing mode?

That would help me narrow down the issue while continuing my testing.

Thank you.

I got one AM263Px CC. Did you check the CCMR_CCMSR1 register?

I am checking CCM status register only for self test, I will once try checking now for error forcing mode also. Thankyou

I have monitored the CCM status register, and I do not see any bits set in CCMR_CCMSR1. In only ESM register (0x52D00444), I see triggering of self-test error pulse, compare error pulse, and miscompare error pulse.

                         

HI Vandana,

I didn't see any valid value for CCMR_CCMSR1 in CCS memory browser. 

Vandana Chintala said:

When I am performing error forcing for CPU/VIM output compare (by writing 9), the ESM events observed are CPU compare error pulse, CPU miscompare error pulse, and self-test error.

Which registers are you checking? CCS doesn't have registers pane for AM263P device, and I am not able to add a breakpoint to pause the code execution to check the memory.

Hi Wang,

To pause the code, I am inserting a while(1) loop immediately after configuring the CCM Key Register (by writing 9) and then flashing the code.

This halts execution, after which I use the CCS memory browser to monitor the ESM Group 2 status register at address 0x52D00444
(ESM_PCR_GENERATED_MEMORY_MAP_ERR_GRP_STS_J = 0x52D00404h + formula).

At this address, I consistently observe the value 0x00080140, which indicates that bits 6, 8, and 19 are set — corresponding to CPU compare, CPU miscompare, and self-test error pulses.

I then clear the ESM register and the CCM status register, proceed to the next diagnostic error forcing mode, configure the key register again, and follow the same process to halt execution and check the ESM status register value. 

Hi Wang,

QJ Wang 

For CPU/VIM output compare diagnostic mode error forcing mode, according to TRM expected errors are CCM-R5F-CPU/VIM Compare (ESM_PLS_EVENT_20) and self test Error (ESM_PLS_EVENT_19). Is my understanding correct?

In my code, After performing CCM Error forcing test for CPU output compare Diagnostic mode, I am seeing ESM_PLS_EVENT_19 along with ESM_PLS_EVENT_6 and ESM_PLS_EVENT_8. But I am not seeing ESM_PLS_EVENT_20 (Lockstep Compare) triggering. But according to Table 7-14 of TRM, Compare Error Signal is supposed to trigger for Error forcing test. 

Hi Vandana,

Apologies for the delayed response, i am working on your issue now and will provide you an update as soon as possible.

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Thanks & regards,
Jagadish.

Hi Vandana,

Vandana Chintala said:

For CPU/VIM output compare diagnostic mode error forcing mode, according to TRM expected errors are CCM-R5F-CPU/VIM Compare (ESM_PLS_EVENT_20) and self test Error (ESM_PLS_EVENT_19). Is my understanding correct?

Your understanding was correct, i am testing it from my end and will provide updates soon.

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Thanks & regards,
Jagadish.

Hi Jagadish, 

After testing CCM Error Forcing Mode for all three diagnostic modes, please let me know whether ESM_PLS_EVENT_20 (Lockstep Compare Error) is triggering or not. 

Thanks & Regards, 
Vandana Chintala

Hi Vandana,

You are right about the behavior, it is triggering only ESM_PLS_EVENT_19 and not triggering ESM_PLS_EVENT_20 (Lockstep Compare Error):

Now i am checking with internal team on this behavior and will post further updates soon.

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Thanks & regards,
Jagadish.

Hi Jagadish,

Thanks for the update. Please let me know the updates once discussion is done with your internal team. 

Thanks & Regards, 
Vandana.

Vandana Chintala said:

Thanks for the update. Please let me know the updates once discussion is done with your internal team. 

Currently internal team actively working on it and will share you update as soon as i got updates from them.

Hi Jagadish, 

Any update from your internal team regarding this issue?

Hi Sahana H G , jagadish gundavarapu 
Based on the updated TRM I have formulated a table on list of Error flags to be triggered for each diagnostic mode (Error flag to be triggered), also including the Error flags that are being triggered for our CCM code (ESM Error pulse triggered). Can you please confirm if it is the correct behavior. It would really help us moving forward. 

NOTE: In case of Inactivity monitor self test failure, Can we not enable Miscompare Error in the ESM since Self Test Error is already there in place to indicate the failure. 

 

Thanks & Regards, 
Vandana Chintala

Hi Vandana,

In Active compare lockstep, in case of any error not only just flags along with them Error signals will also get triggered, but this happen only if actual error occurs just like you mentioned. Refer below image to confirm the same,

Here Enabled means, if the real actual error occurred then those error signals will get triggered. That means depends on the error either Self-Test or Lockstep Compare error signal will get triggered.

Similarly in the case of Self-Test, Self-Test Error Signal is enabled but lockstep compare error signal is disabled. That means in the case of actual real Self-Test Error this signal will get asserted.

Similarly in self-test error forcing also, lock step error compare is enabled that means in the case of actual real compare error this signal will get asserted.

Apart from these you excel seems to be very correct and it is very helpful as well.

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Thanks & Regards,
Jagadish.