Other Parts Discussed in Thread: SYSCONFIG
Hello,
I am trying to use the MCAN peripheral on MSPM0G3107, and have encountered an issue where the memory initialization procedure will not complete after a power-on reset (by applying power or via nRST).
When in this state, reads to all MCAN registers (i.e. via DL_MCAN_getRevisionId and others) will always return zeros via the CPU or via a debugger.
By using a debugger to reset the device (I believe this is a SYSRST?) the check seems to pass more reliably.
int main(void)
{
DL_GPIO_enablePower(GPIOA);
delay_cycles(POWER_STARTUP_DELAY);
DL_GPIO_initPeripheralInputFunction(GPIO_HFCLKIN_IOMUX, GPIO_HFCLKIN_IOMUX_FUNC);
DL_SYSCTL_setHFCLKSourceHFCLKIN();
DL_MCAN_reset(MCAN0_INST);
DL_MCAN_enablePower(MCAN0_INST)
delay_cycles(POWER_STARTUP_DELAY);
static const DL_MCAN_ClockConfig gMCAN0ClockConf = {
.clockSel = DL_MCAN_FCLK_HFCLK,
.divider = DL_MCAN_FCLK_DIV_1,
};
DL_MCAN_enableModuleClock(MCAN0_INST);
DL_MCAN_setClockConfig(MCAN0_INST, (DL_MCAN_ClockConfig *) &gMCAN0ClockConf);
while(false == DL_MCAN_isMemInitDone(MCAN0_INST));
while (1) {
delay_cycles(10000);
}
}I am able to reproduce this starting with a completely empty project (not using SysConfig).
By changing the "delay_cycles" call from POWER_STARTUP_DELAY (16) to 1000000, this problem seems to go away, and initialization is reliable.
As such, projects using SysConfig are unlikely to encounter this issue due to initialization order - there are many more clock cycles between peripheral power enable and the first register reads and writes.
Is there published documentation surrounding the MCAN peripheral startup requiring extra clock cycles before enabling the clock request and accessing registers?
I do not see a section in the Technical Reference Manual which mentions this behaviour - Section "2.2.6 Peripheral Enable" includes a note stating to wait 4 ULPCLK cycles before accesing peripherals.
