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AM2612: About RGMII topic

Lu Bruce
Prodigy 50 points

Part Number: AM2612

Hi TI support team,

Regarding the CPSW module, I have a solution to help confirm whether it is supported : 

(1) Can the CPSW module receive messages from RGMII2 and send them directly through RGMII1? 

(2) If the first item is supported, how to configure the CPSW module? 

 

The network communication architecture is shown in the following figure, Please help confirm whether it is supported on the AM2612 chip.

QrohbOPgGouUWyxmW6Cc6fJenth.jpg

 

Best regards,
Bruvin Lu. 

  • 0
    TI__Expert 6795 points

    Hi Bruvin Lu,

    Lu Bruce said:
    Can the CPSW module receive messages from RGMII2 and send them directly through RGMII1? 

    Does this mean all kinds of ethernet packets or certain packets, for example multicast packets or broadcast packets and so on ?

    Regards,

    Aswin

  • 0
    Prodigy 50 points

    Hi Aswin Sankar,

    What I mean is whether the Ethernet data of PORT2 (including all packets from FPGA ) can be directly forwarded to PORT1 for transmission to PHY, and the data input by PORT1 does not need to be forwarded to PORT2 but uploaded to the Eth driver.

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    HI Bruvin, 

    I understood that the requirement is 

    1. All packets from FPGA needs to go to the PHY connected to PORT 1 (RGMII1)

    2. All packets from arriving at PORT 1 needs to go to the Eth driver and should not go to RGMII2.

    Let me check how this can be done. This would be done with the help of correct policier configurations.

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    TI__Expert 6795 points

    Hi Bruvin, 

    Meanwhile please review this proposal.

    If we can control the desintation address of the packets being send to PORT 1 and PORT 2, then we can enforce an ALE configuration based on mutlicast addresses.

    That is we can configure certain packets with a particular multicast address to go to Eth driver (host port) only and certain packets with a particular multicast address to go to the next port (PORT1 in this case) without going to the Eth driver (host port).

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    Yes, those are exactly the two requirements mentioned above.

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    For this proposal, is the unicast address not applicable?

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    Hi Bruvin,

    Unknown unicast packets will be switched to other port. Also there is an option to send unknown unicast packet to host as well, this needs to be configured.

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    Please confirm the following requirements:

    1. If the FPGA sends a data packet with a unicast address to PORT2(RGMII2), will the data packet be sent to the Eth Driver or PORT1(RGMII1)?

    2. If the Eth Driver sends a data packet with a unicast address to PORT1(RGMII1), will the data packet be sent to the PHY?

    Best Regards,

    Bruvin

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points
    Lu Bruce said:
    If the FPGA sends a data packet with a unicast address to PORT2(RGMII2), will the data packet be sent to the Eth Driver or PORT1(RGMII1)?

    Would this be the mac address of AM261 or the address of a different device ?

    If this is the address of a different device then the packet will go to PORT 1 and not Eth driver.

    Lu Bruce said:
    If the Eth Driver sends a data packet with a unicast address to PORT1(RGMII1), will the data packet be sent to the PHY?

    Yes this will happen as this is the default behaviour.

    Please note that, how the packet is routed is entirely based on the packet's desintation address. Not on ingress port number. ALE configuration rules will use the destination address as the matching criteria.

    Please let me know if this fulfills the requriement.

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    1. The mac address of a different device, not AM2612. 

    2. I think that only multicast or broadcast addresses need to configure ALE to filter messages, while unicast addresses will be routed to the terminal based on the destination address, right?

    3. If the second item is fulfilled, then the requirement can be satisfied.

    4. By the way, If the source address and destination address of the Ethernet data sent by the FPGA are consistent with the data sent by the ETH DRIVER, can the data sent by the FPGA be sent to the PHY through PORT1?

    Best Regards,

    Bruvin

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    Hi Bruvin,

    Lu Bruce said:

    The mac address of a different device, not AM2612. 

    Then it will no go to the Eth driver but it will go to the PORT 1. However there is an option to make it go to Eth driver by enabling unknown unicast flood to host option.

    Lu Bruce said:
    I think that only multicast or broadcast addresses need to configure ALE to filter messages, while unicast addresses will be routed to the terminal based on the destination address, right

    Yes this is correct. Multicast addresses and broadcast address can be configured using ALE rule.

    Since broadcast address is ff:ff:ff:ff:ff:ff:ff, if any packets with this DA comes to the device on PORT 1 or PORT 2, it will go to the other port and will not go to the host port (eth driver).

    Lu Bruce said:
    By the way, If the source address and destination address of the Ethernet data sent by the FPGA are consistent with the data sent by the ETH DRIVER, can the data sent by the FPGA be sent to the PHY through PORT1?

    I could not get this. Can you please explain this with an example ?

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    For example,

    1. The FPGA sends a udp data packet (A1) with the source mac address (01:02:03:04:05:06) and the destination mac address (05:08:09:05:09:03).

    2. The ETH DRIVER sends a udp data packet (A2) with the source mac address (01:02:03:04:05:06) and the destination mac address (05:08:09:05:09:03).

    3. The mac address of the external device is 05:08:09:05:09:03, and the mac address of AM2612 is 01:02:03:04:05:06.

    Can both the udp packets of A1 and A2 be transmitted to the PHY?

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    Hi Bruvin, 

    I see that the source address of both the devices in this network is same and the device address is also a mutlicast mac address, May I confirm if this is intended ?
    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    TI__Expert 6795 points

    Hi Bruvin, 

    The usecase you have mentioned in the example can be achieved with unciast addresses as well without any ALE configurations.

    Suppose 

    AM261 has a unicast device mac address M1

    FPGA has a unicast device mac address M2

    The external device connected to AM261 has a mac address M3.

    When the FPGA sends a packet with M3 as DA, it will enter AM261 and will go PORT 1, this wil not go to the Eth driver.

    When AM261 sends a pakcet with M3 as DA, it will go to PORT1.

    You can do this experiment with an AM261 LP. You can run the enet layer 2 cpsw example and check by sending some packets. 

    PORT 1 of AM261 can be connected to a PC via a network analyser tool like wireshark.

    Send a packet to PORT2 of AM261 and observe PORT 1, you would see the packet coming out of PORT 1. Eth driver will not take this packet as ALE will not route it to PORT0 as this packet is intended for some other device.

    Send a packet from AM261 and observe PORT1, you would see the packet coming out of PORT1. You can send directed packets to make this packet go only to PORT 1 and not PORT 2. 

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    Yes, what I want to express is that FPGA and AM261 use the same source address because the FPGA is not a separate network device.

    Regards,

    Bruvin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    It seems to meet our requirements. Thank you for your answer.

    Regards,

    Bruvin

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    Hi Bruvin, 
    Thanks for the feedback.

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    Please help confirm following situation:

    AM261 has a unicast device mac address M1

    FPGA has a unicast device mac address M1

    The external device connected to AM261 has a mac address M2.

    When the FPGA sends a packet with M2 as DA, it  will go PORT 1?

    When AM261 sends a pakcet with M2 as DA, it will go to PORT1?

    Regards,

    Bruvin

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    Hi Bruvin, 

    M1 and M2 are unicast addresses right?

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Yes, M1 and M2 are unicast addresses.

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    Hi Bruvin,

    Is it possible to give FPGA a different MAC address ?

    In this case what would happen is that the packets coming from FPGA will be dropped by AM261 becuase source address of both AM261 and FPGA is same. 

    In ALE table, we can see that the entry for this mac address has secure bit has one which is causing this.

    Let me check if there is a way to override this. Meanwhile can you confirm if it is possible for FPGA to have a different mac address?

    Regards.

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    The source address of the FPGA is the same as that of the AM261. Since the FPGA and AM261 form a complete device in this system, the network messages sent from the device have only one source address.

    Regards,

    Bruvin

  • +1 in reply to Aswin Sankar
    TI__Expert 6795 points

    Hi Bruvin,

    To override this, you would need to edit the ALE entry. This API can used to do this.

    static void addUnicastAleEntry(void)
{
    uint32_t status;

    Enet_IoctlPrms prms;
    CpswAle_SetUcastEntryInArgs setUcastInArgs;
    uint32_t entryIdx;
    /* ALE entry with "secure" bit cleared is required for loopback */
    setUcastInArgs.addr.vlanId  = 0U;
    setUcastInArgs.info.portNum = CPSW_ALE_HOST_PORT_NUM;
    setUcastInArgs.info.blocked = false;
    setUcastInArgs.info.secure  = false;
    setUcastInArgs.info.super   = false;
    setUcastInArgs.info.ageable = false;
    setUcastInArgs.info.trunk   = false;
    EnetUtils_copyMacAddr(&setUcastInArgs.addr.addr[0U], gEnetApp.perCtxt[0].macAddr);
    ENET_IOCTL_SET_INOUT_ARGS(&prms, &setUcastInArgs, &entryIdx);

    ENET_IOCTL(gEnetApp.perCtxt[0].hEnet, gEnetApp.coreId, CPSW_ALE_IOCTL_ADD_UCAST, &prms, status);
    if (status != ENET_SOK)
    {
        EnetAppUtils_print("Failed to add ucast entry: %d\r\n", status);
    }
}

    Once the ALE entry is edited, the secure bit will not be set. Then pakcet switching will happen.

    Packets from Eth driver will also go out to Port1. If you are not sending directed packets from Eth driver, then packets can go to both ports. So if packets sent from Eth driver need to only go to a specific port, then you would need to send directed packets.

    Regards,

    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    Thanks for the feedback. I think this solution meets the requirements.

    Regards,

    Bruvin

  • 0 in reply to Lu Bruce
    TI__Expert 6795 points

    Hi Bruvin, 

    Thanks for the feedback.

    Let me know if you require any help with examples or configurations.

    Regards,
    Aswin

  • 0 in reply to Aswin Sankar
    Prodigy 50 points

    Hi Aswin,

    OK

    Regards,

    Bruvin