Part Number: TMS570LS1227
Other Parts Discussed in Thread: AM2612
Team,
Can you please help with the below customer question?
Thanks in advance,
Anber
This is a performance analysis of 32bit-CRC LUT-based processing for Ethernet packets.
Our motivation for deactivated cache is higher determinism:
TMS570 seems to have relatively long calculation times for this use case
and apparently LS1227 @150Mhz (without cache) is faster than the LC43 @300MHz (deactivated cache).
Can you confirm those numbers?
Do you have an idea of what we could have missed to improve results?
We already varied the location of LUT and instructions between Flash and RAM.
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Ethernet CRC, 32 Bit |
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Ethernet Polynom --> 0x04C11DB7 |
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TMS570LC43 - CRC Calculation |
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Frequency |
Core: 300 MHz | Busse: 150 MHz (2:1) |
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Lookup-Table (normal) |
1514 Bytes in µs |
42 Bytes in µs |
|
from ROM with Cache |
214 |
9 |
|
from ROM without Cache |
927 |
35 |
|
from RAM without Cache (Table + calcCRC) |
977 |
35 |
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from RAM without Cache (calcCRC) |
977 |
35 |
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from RAM without Cache (Table) |
927 |
35 |
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Slicing-by-8 |
1514 Bytes in µs |
42 Bytes in µs |
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from ROM with Cache |
51 |
2 |
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from ROM without Cache |
537 |
21 |
|
from RAM without Cache (Table + calcCRC) |
430 |
17 |
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from RAM without Cache (calcCRC) |
480 |
19 |
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from RAM without Cache (Table) |
473 |
19 |
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TMS570LS1227 (does not have Cache) |
TMS570LS1227 - CRC Calculation |
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Frequency |
Core: 150 MHz | Busse: 75 MHz (2:1) |
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Lookup-Table (normal) |
1514 Bytes in µs |
42 Bytes in µs |
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from ROM |
485 |
19 |
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from RAM (Table + calcCRC) |
484 |
19 |
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from RAM (calcCRC) |
484 |
19 |
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from RAM (Table) |
485 |
19 |
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Slicing-by-8 |
1514 Bytes in µs |
42 Bytes in µs |
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from ROM |
139 |
6 |
|
from RAM (Table + calcCRC) |
112 |
5 |
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from RAM (calcCRC) |
130 |
6 |
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from RAM (Table) |
105 |
5 |